The first part of the instruction execution cycle is the fetch cycle.
Tnstruction cycle Each computer's CPU can have different cycles based on different instruction sets, but will be similar to the following cycle:
1. Fetch the instruction
The next instruction is fetched from the memory address that is currently stored in the Program Counter (PC), and stored in the Instruction register (IR). At the end of the fetch operation, the PC points to the next instruction that will be read at the next cycle.
2. Decode the instruction
The decoder interprets the instruction. During this cycle the instruction inside the IR (instruction register) gets decoded.
3.In case of a memory instruction (direct or indirect) the execution phase will be in the next clock pulse.
If the instruction has an indirect address, the effective address is read from main memory, and any required data is fetched from main memory to be processed and then placed into data registers(Clock Pulse: T3). If the instruction is direct, nothing is done at this clock pulse. If this is an I/O instruction or a Register instruction, the operation is performed (executed) at clock Pulse.
4. Execute the instruction
The Control Unit of CPU passes the decoded information as a sequence of control signals to the relevant function units of the CPU to perform the actions required by the instruction such as reading values from registers, passing them to the ALU to perform mathematical or logic functions on them, and writing the result back to a register. If the ALU is involved, it sends a condition signal back to the CU.
On a pipelined CPU, all the stages work in parallel. When the 1st instruction is being decoded by the Decoder Unit, the 2nd instruction is being fetched by the Fetch Unit. This results in a shorter or lesser clock cycles to execute 2 instructions compared to unpipelined CPU.
The opcode fetched from the memory is being decoded for the next steps and moved to the appropriate registers. Fetch operands from memory if necessary: If any operands are memory addresses, initiate memory read cycles to read them into CPU registers.
The sequence of steps that a CPU performs.Also known as fetch-decode-execute cycle.
This is the fetch instruction that the CPU takes for executing.
fetch decode exec store
There are three fetch cycles in a three byte instruction. The first one is four clock cycles long, while the other two are three clock cycles long. Depending on what the instruction does, there will then be more read/write cycles.
The CPU speed, and processor speed is the amount of cycles that a CPU can perform per second.CPU speed is not a good indicator of CPU performance.
Megahertz
fetch,decode
1. Fetch 2. Decode 3. Execute
A 3.2GHz CPU would be 3.2 Giga Hertz (3.2 Billion cycles per second).
-Hertz. Or cycles per second. Megahertz, GigaHertz, etc.