0
... in CE configure...
as Vo=Vcc-Ic Rc now as Vcc is consistent. v can say Vo is directly proportional 2 (-Ic Rc) so now when the base voltage is increased Ib will inc. thus, Ic will inc. cuz Ic=beta Ib thus Ic Rc drop increases... as Vo is prop 2 -Ic Rc thus, Vo will decrease...thus d curve for d +ve half cycle in which Ib is increasing drawn in 180 deg phase showing Vo is dec. n vice versa 4 -ve half cycle...
now in CC...
as d o/p is taken from emitter... Vo= Ie Re so der's no -ve sign..n for d +ve cycle Ie will increase leakage current) as der's no-ve sign it'll b in phase wid i/p..hence no phase shift as leakage current doesn't increase so much thus, dis o/p voltage Ie Re doesnt inc much thus, d o/p doesn't amplify much thus dis configure known as emiter follower...
now in CB,...
d I/P is applied at emitter n o/p is taken from collector... so, 4 d +ve half cycle d Eb junc will b more FB thus causing incr. in Ib n thus, in Ic... so inc. in Ic causes inc. in o/p voltage..n during -ve half cycle d junc will b less FB so o/p voltage will b decreasing..hence der's no phase shift...
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0 CB with A?
0 C. B. with A.
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When the ring, R, is an integral domain. That is, when R has no zero divisors. Consider: ab=cb => ab-cb=0 => (a-c)b=0 Then because R has no zero divisors we have: a-c=0 => a=c
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How do you type an egg?
shift+9 shift+0
Difference between absolute PSK and differential PSK?
In abs. PSK only instant phase for the incoming bits are considered. For DPSK, the difference between previous phase and the present phase is considered. Example: If BPSK is used, then for 0 if phase if pi and for 1 it is 0, then for abs. BPSK the phase states for the bit stream 1010 will be 0,pi,0,pi for DPSK, we assume initial phase is zero and a rule that , if incoming bit is zero, then phase difference is 0 and if it is 1 then, phase difference is pi. So, phase difference will be--pi,0,pi,0 Instant phase will be, pi,pi,0,0....Easy!!
