A: I wouldn't call propagation delay that applies to other media. for a PC delay are parasitic in nature mostly layout. But the real and actual delay is inherited from the I/O which is the soul of PC speed. No matter how fast a PC is internally it must service those interrupts and that is really the delay actually
Another name for propagation delay is latency.
TTL
it is in micro seconds
symbol of on delay timer
Speed-Power-Product or SPP
Another name for propagation delay is latency.
Propagation delay is the time it takes for electronic devices to switch from one logic state to another.
In TTL (Transistor-Transistor Logic) circuits, resistance and propagation delay are inversely related. Higher resistance in the circuit can lead to increased propagation delay, as it affects the charging and discharging times of capacitive loads. This delay is primarily due to the time it takes for the output to transition from one state to another, which is influenced by the RC time constant (where R is resistance and C is capacitance). Thus, optimizing resistance is crucial for improving speed in TTL logic applications.
Processing delay Queuing delay Transmission delay Propagation delay
TTL
propagation delay in the ring/transmission delay of the packet<1
it is in micro seconds
relatively large propagation delay.
Packet delay is caused by several factors, including propagation delay, transmission delay, queuing delay, and processing delay. Propagation delay occurs as packets travel through the medium, while transmission delay is the time taken to push all packet bits onto the network. Queuing delay happens when packets wait in line at routers or switches due to network congestion, and processing delay is the time taken by devices to process the packet headers and make forwarding decisions. Each of these factors can contribute to the overall delay experienced in data transmission.
200ns
The parallel adder which we use in the digital circuits ,the carry output of each full adder stage is connected to the carry input of the next higher order stage.therefore,the sum and carry outputs of any stage cannot be produced until the input carry occurs; This leads to a time delay in the addition process.This delay is known as carry propagation delay. to the second question the propagation delay can be avoided in the binary parallel adder with the help of look ahead carry generator .............................................................................................................................
Propagation Delay In digital logic, every gate has got some finite amount of delay because of which the change in the output is not instantaneous to the change in the input. In simple terms, the times it takes for an input to appear at the output is called the propagation delay. In Figure 6, tPHL, describes the time it takes for an input to cause the output to change from logic-level-high to logic-level-low. Similarly, tPLH, refers to the delay associated when an input change causes the output to change from logic-level-low to logic-level-high. The overall delay is average of these two delays.