Difference between two address instruction and one address instruction?

Answer 1

Two address instructions use registers as operand locations.

Example of a half word length (16 bit) Two address format.

Bits 0-3 OP-Code bits (4 bits 16 different Mnemonics).

Bit 4 instruction type ( e.g. 0 means half word length).

Bit 5 fixed at value 1 used as extension to op-codes.

Bits 6-9 Address A (4 bits refers to a registers hence a total of 16 registers).

Bits 10-11 addressing modes ( 2 bits hence 4 different addressing modes in this case).

Bits 12-15 Address B (4 bits refers to a registers hence a total of 16 registers).

If 16 OP-codes for One address instructions is to be: ADD, ADC, SUB, SBC, XOR, BIT, CMP, INC, DEC, LDA, STA, AND, OR, JMP, BRN, JSR.

For Two address instructions the following 6 OP-Codes are dropped: INC, DEC, STA, BRN, JMP, JSR, but new OP-Codes with the help of bit #5 is introduced instead

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now let's to introducing

One Address Instructions

This is for a 32 bit CPU word length.

Bits 0-3 OP Code bits (4 bits 16 different OP Codes).

Bit 4 word length (0/1 Two different length 16 or 32 bit in this case).

Bits 5-7 Addressing Modes (3 bits 8 different Addressing Modes).

Bits 8-31 # of Addresses (2^24 Addressing Options).

The possible OP-Codes could be: ADD, SUB, ADC, SBC, AND, XOR, ORA, BIT, CMP, LDA, STA, INC, DEC, BRN, JSR, JMP.

one addressing

24 bit Address

3 bit AM

1/0

OP Code

two addressing

0000

00

1111

1

0

0010

Answer 2

y=(a-b)/(c+de)