____
____ c ----->|xor |------------> s
a ->|xor |-+------------>|____|
b ->|____| | _____ _____
+--->|nand |------>|nand |--> c
c ----->|_____| +-->|_____|
_____ |
a ----->|nand |--+
b ----->|_____|
First of all, NAND and NOR gates have been proven to be logically complete. That means you can create every other logical gate with just NANDs or just NORs. Other gate functions are XOR, AND, OR, NOT, etc.
To clarify: The notation I am using is [NAND] represents the NAND gate. Having A,B means the two inputs are A and B. If there is just one input, then that input gets mapped to both inputs. The '|' is supposed to show a junction between two lines. '-' is a single line and '=' is a double line. The '. . .' is just empty space, trying to keep the diagram intact.
Some NAND designs we will need are:
AND: A,B--[NAND]==[NAND]-->out
OR: A--[NAND]--|==[NAND]--out
. . . .B--[NAND]--|
first NAND connects to top and bottom NANDs
last NAND has inputs taken from output of the middle two NANDs
. . . . . . . . . . . . . . . A--|[NAND]---|
XOR: A,B--[NAND]------| . . . . . . . |===[NAND]--out
. . . . . . . . . . . . . . . B--|[NAND]---|
Sorry if the diagram is difficult to follow.
The second part is what a full adder is. A full adder is a system that takes in three signals and outputs two. The three input signals are A, B, and Cin. The two outputs are S and Cout. The point of a full adder is that you can cascade them. The Cout of the first becomes the Cin of the second. That way you have a general one bit adder, but can make an N bit adder by stringing cascading them. So the first step in creating a full adder is writing out the truth table, a table where inputs get mapped to specific outputs. I am going to use '-' in place of spaces so the spacing stays the same after I post.
Input- - - - - - - - - - - - - - - -Output
A - - B - - Cin - - - - - - - - - S - - Cout
0 - - 0 - - 0 - - - - - - - - - - -0 - - 0
0 - - 0 - - 1 - - - - - - - - - - -1 - - 0
0 - - 1 - - 0 - - - - - - - - - - -1 - - 0
0 - - 1 - - 1 - - - - - - - - - - -0 - - 1
1 - - 0 - - 0 - - - - - - - - - - -1 - - 0
1 - - 0 - - 1 - - - - - - - - - - -0 - - 1
1 - - 1 - - 0 - - - - - - - - - - -0 - - 1
1 - - 1 - - 1 - - - - - - - - - - -1 - - 1
It can be seen that S = [A XOR B XOR Cin]
It can be seen that C = [(A AND B) OR (A AND Cin) or (B AND Cin)]
or equivelently (and more efficiently) C = [(A AND B) or (C AND (A XOR B))]
Its probably not completely obvious at first, but using Karnaugh maps or other techniques you get this result.
So now it is just a matter of replacing each gate (XOR AND OR) with its correspdonding NAND system. Although I am sure it would be quite a feat to put that diagram up on here using text symbols, I feel that I am not up for that rather large task, haha. Hope this answered your question or helps lead you in direction you are looking for.
You can find a drawing of a half adder here: http://www.dumpt.com/img/viewer.php?file=bd6b3mqsa66fhr6c76l1.bmp
You cannot design a full adder using only OR gates. You also need AND gates. Typically, this can be done with just NAND gates.
by using 4 NCL gates we can design or implement a half adder.gates used in half adder are TH12[1 GATE],TH22[1 GATE] and TH24COMP0 [2 GATES].this NCL have a concept of DUAL-RAIL.output we get for this are S0,S1,Cout0,Cout1.
logic gates can be executed without breadboards using printed circuit boards instead of breadboards or by using bulbs and switches in 230 v ac current.Former need soldering and is permanent one while latter is a tiresome method.......use pcb it will be easy ....:::))))
universal logic gate is a gate using which you can make all the logic gates there are two such gates NOR gate and NAND gate
Any hardware whatsoever satisfies the conditions of this question ... as long as it hasthree input lines ... since the question neglects to specify what it wants the circuit to dowith the 3-bit input number.
ab+bc
by the procedure design a half subtractor design a logic ciruit to add two numbers with five bits each drawthe logic diagram of afull adder using using NAND gates only ?
Logic circuit forplementation of a full adder using decoder and 2 or gate? Read more:Logic_circuit_forplementation_of_a_full_adder_using_decoder_and_2_or_gate
more logic gates are used instead
You cannot design a full adder using only OR gates. You also need AND gates. Typically, this can be done with just NAND gates.
by using 4 NCL gates we can design or implement a half adder.gates used in half adder are TH12[1 GATE],TH22[1 GATE] and TH24COMP0 [2 GATES].this NCL have a concept of DUAL-RAIL.output we get for this are S0,S1,Cout0,Cout1.
12 NOR gates are required to implement full adder
Logic gates are in fact the building block of digital electronics; they are formed by the combination of transistors (either BJT or MOSFET) to realize some digital operations (like logical OR, AND, INVERT ). Every digital product, like computers, mobile, calculators even digital watches, contain logic gates. The use of logic gates in digital world can be understood better by the following example: the single bit full adder in digital electronics is a logic circuit which perform the logical addition of two single bit binary numbers (a,b,cin) a and b are the the two binary number of single digit (either 1 or 0) and cin is the carry input . say for example a,b,cin= 1,1,1 gave an logical sum output of 1 and a carry of 1 , a,b,cin= 110 gave sum= 0 and carry of 1. Now this adder can be formed by the combination of many gate like by using NAND gates only. or by using XOR , AND ,OR gates and so on. So, in a nutshell, the adder which is of great importance in your computer processor and also in many more applications is basically built from the logic gates.
Logic gates are in fact the building block of digital electronics; they are formed by the combination of transistors (either BJT or MOSFET) to realize some digital operations (like logical OR, AND, INVERT ). Every digital product, like computers, mobile, calculators even digital watches, contain logic gates. The use of logic gates in digital world can be understood better by the following example: the single bit full adder in digital electronics is a logic circuit which perform the logical addition of two single bit binary numbers (a,b,cin) a and b are the the two binary number of single digit (either 1 or 0) and cin is the carry input . say for example a,b,cin= 1,1,1 gave an logical sum output of 1 and a carry of 1 , a,b,cin= 110 gave sum= 0 and carry of 1. Now this adder can be formed by the combination of many gate like by using NAND gates only. or by using XOR , AND ,OR gates and so on. So, in a nutshell, the adder which is of great importance in your computer processor and also in many more applications is basically built from the logic gates.
Logic gates are in fact the building block of digital electronics; they are formed by the combination of transistors (either BJT or MOSFET) to realize some digital operations (like logical OR, AND, INVERT ). Every digital product, like computers, mobile, calculators even digital watches, contain logic gates. The use of logic gates in digital world can be understood better by the following example: the single bit full adder in digital electronics is a logic circuit which perform the logical addition of two single bit binary numbers (a,b,cin) a and b are the the two binary number of single digit (either 1 or 0) and cin is the carry input . say for example a,b,cin= 1,1,1 gave an logical sum output of 1 and a carry of 1 , a,b,cin= 110 gave sum= 0 and carry of 1. Now this adder can be formed by the combination of many gate like by using NAND gates only. or by using XOR , AND ,OR gates and so on. So, in a nutshell, the adder which is of great importance in your computer processor and also in many more applications is basically built from the logic gates.
logic gates can be executed without breadboards using printed circuit boards instead of breadboards or by using bulbs and switches in 230 v ac current.Former need soldering and is permanent one while latter is a tiresome method.......use pcb it will be easy ....:::))))
draw a logic circuit of the clocked SR flip-flop using NOR gate