Refreshing memory is not an 8085 specific thing. It has to do with the hardware design of the dynamic RAM used in the system, so it is impossible to give an answer without details of the particular system.
In general, however, "quick and dirty" memory refresh schemes use a recurring interrupt at some frequency, and the interrupt service routine scans through a list of row or column addresss in RAM to execute a manual refresh cycle. The very big downside of this scheme is that you can never stop the processor with the READY pin for more than a very, very short period of time without risking the loss of all of RAM. This complicates debuggers, though it does not make them impossible.
As far as the 8085 itself, internal refresh occurs automatically, so long as you maintain a certain minimum clock speed, typically 500KHz.
The 8085 can address 216, or 65536 different memory locations.
explain how slow memory get interfaced with 8085
Yes. It should refresh almost instantaniously.
READY
In an 8085 system, the memory word size required is 8 bits. This means that each memory location can store 8 bits or one byte of data. The 8085 processor accesses memory locations using these 8-bit memory addresses to read or write data during program execution. The memory word size of 8 bits allows the 8085 system to handle data in small, manageable chunks efficiently.
64K
Registers or RAM-memory.
8 bits
64 kb
Memory refresh failure
The 8085 microprocessor is an 8-bit processor with a 16-bit address bus. This means it can access a maximum of 64 KB (2^16) of memory. The 8085 can address memory locations from 0000H to FFFFH, totaling 64 KB of memory space. This limitation is due to the 16-bit address bus, which can only address up to 64 KB of memory.
The memory capacity of the 8085 microprocessor is 64 kb because the address bus is 16 bits, and you can address 216, or 64kb, with a 16 bit address bus.