answersLogoWhite

0


Best Answer

A: using a multimeter or scope it can be verifies the states of a logic device either as '1' or a '0' which translates to true = hi [volts] = '1' and '0' as low [volts] = '0'. '0' is a false state and '1' is a true state. Must add that the voltmeter will not decipher hi or low if toggling

User Avatar

Wiki User

13y ago
This answer is:
User Avatar

Add your answer:

Earn +20 pts
Q: How can you tell if the input or output of a logic device is HIGH or LOW?
Write your answer...
Submit
Still have questions?
magnify glass
imp
Related questions

How do you check an inverter circuit?

An inverter logic device is characterized by an P-channel BJT Bipolar Junction Transistor internally. This simply means by applying an logic HIGH on input X will result in logic LOW on output Y. The Boolean expression for this device is X NOT Y . (XY') INPUT X | OUTPUT Y ---------------------------- 1 | 0 0 | 1 1 = HIGH +5 Vdc 0 = LOW +0 Vdc Testing: Simple Logic Probe connected to Vcc and Gnd


Why an open ttl gate behaves as a logic high input?

because TTL have a bias input setup to eliminate noise therefore the output will follow the logic one input if left open


What is propagation delay in flip flops?

Propagation Delay In digital logic, every gate has got some finite amount of delay because of which the change in the output is not instantaneous to the change in the input. In simple terms, the times it takes for an input to appear at the output is called the propagation delay. In Figure 6, tPHL, describes the time it takes for an input to cause the output to change from logic-level-high to logic-level-low. Similarly, tPLH, refers to the delay associated when an input change causes the output to change from logic-level-low to logic-level-high. The overall delay is average of these two delays.


Why diode logic gate is not suitable for cascading operation?

the pullup or pull down resistance in the diode logic gate makes it a high output resistance device.If u try to drive another diode logic gate with it the output voltage of the first gate will be affected by the resistance in the second gate.A diode logic gate should always drive a high input resistance input.


Answer What is the difference between output and input?

Input refers to data entered into a system, while output refers to the results produced by the system based on the input. Input is the information provided to a system, while output is the response or outcome generated by the system.


What is a TTL-compatible output?

Compatibility in TTL means that the output of one TTL device can be used to drive the Input of the other TTL device , This because the low and high output window fit inside the low and high input window/profile TTL stand for Transistor Transistor Logic, so any voltage between 0 and 5 volt is compatible where any voltage between 3V and 5V is logic 1 and zero volt is logic 0


What is a TTL compatible output?

A: TTL gates operates on the premise of having +5 dc on the rail therefore the output will be in the range +5 volts. A cmos gate while similar to a TTL function is not really compatible since the output volts can be 12 volts or more. Besides that TTL gates require some input current for it to operate


Which logic gate has output high if and only if all inputs are low?

NOR - has two or more inputsinverter - only has one input, so that input is all inputs


What gate the output will be low for any case when one or more input are zero?

An inverter has a high output when the input is low, and a low output when the input is high.


What is OR gate in logic gate?

1. NAND gate is used to invert the input A (by connecting A to both inputs). 2. NAND gate used to invert B the same way 3. Now put A' and B' into into a third NAND gate. The output will be (A'B')' which is equivalent to A+B.


Can nand be inhibitted or disabled?

I suppose so. If a three input NAND is used as a two input device, the third input can be viewed as an inhibit input. Also some NAND devices can be "3 stated" where the output goes to a high impedance.


What is NAND gate in semiconductor devices?

A NAND gate is digital logic device which will have 2 or more inputs which can be logic 1 or logic 0 (on or off, high or low) with all the inputs at logic 0 the output will be at logic 1, the only time the output will switch to a logic 0 is when ALL the inputs are at logic 1. here is a simple "truth table" To show the basic operation Input1 Input2 Output Off--------Off------- On Off--------On------- On On--------Off------- On On------- On------- Off NAND stand for not AND therefore a false will be present on the output only when both input are true ANSWER: NAND stands for NOT AND it simply negate the function. The only time that the output can be false if all inputs are true. In logic functions there is no ON-OFF it is either true or false "1" or "0"