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A high code-density microcontroller architecture with changeable instruction formats has a memory for storing compressed instructions each including a group prefix and at least one index. An instruction decompressor is provided for decompressing the compressed instructions to be executed into original instructions. The instruction decompressor includes a plurality of instruction group decoding tables, each being stored with the original instructions of a predetermined type. One instruction group decoding table is selected based on the group prefix of the compressed instruction for searching the corresponding original instruction therein by the index of the compressed instruction.

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Q: What do you mean by high Code Density for arm processors?
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