What is meant by biasing in a single stage ce amplifier?

Answer 1

Biasing in a single stage common-emitter amplifier means to place the base-emitter current at a point where the collector-emitter current is in the middle of the transistor's linear range.

First, you pick the target range and output impedance of the amplifier, picking the collector and emitter resistors. The gain of the stage is collector resistance divided by emitter resistance, limited by available hFe. You want to try to pick a resistor pair that will place the collector voltage in the center of the desired range, while keeping the desired operating current where you want it.

Then, you pick the base resistor divider pair such that the base voltage is the forward bias drop of the base-emitter above (NPN) or below (PNP) the emitter voltage. You find that emitter voltage by considering the collector voltage, along with the operating current and the collector and emitter resistors. (Its straightforward Ohm's law, considering that the collector-emitter forms the third resistor in the divider chain.) You have to consider hFe in this calculation, as well as realizing that the two base resistors will form the input impedance of the stage. (Well, actually, base-emitter current is included in the input impedance calculation, but that is usually a small contribution if the hFe is high enough.)

Then you need to consider the power dissipation in the stage, and make sure that the transistor can handle that, and that hFe will not drift unacceptably under temperature. (Stable designs are such that the hFe is far greater than the ratio of collector resistance over emitter resistance, so that your limits are based on ratio, and not on hFe. Problematic designs are when the desired gain is greater than hFe, such as when the emitter resistance is zero - this makes gain equal to hFe, and introduces the possibility of thermal runaway.)