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ans. 3 nand gates

resoon :-

OR GATE :- x+y

NAND GATE :- x'+y'

LOGIC :-so the logic is is we apply NAND to the inputs x' and y' instead of xand y we would get x+y

DESIGN PROCEDURE

1. for inverting the input x and y can be done by NAND gates ,

2. take a NAND gate and pass both x in both the inputs it means x NAND x gives you x'

3. follow similar procedure for inverting y

4. and then all the outputs of those NAND gates as the inputs of another NAND gate

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Q: What is the minimum no of 2 inputs NAND gates used to perform function of 2 inputs OR gates?
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