ans. 3 nand gates
resoon :-
OR GATE :- x+y
NAND GATE :- x'+y'
LOGIC :-so the logic is is we apply NAND to the inputs x' and y' instead of xand y we would get x+y
DESIGN PROCEDURE
1. for inverting the input x and y can be done by NAND gates ,
2. take a NAND gate and pass both x in both the inputs it means x NAND x gives you x'
3. follow similar procedure for inverting y
4. and then all the outputs of those NAND gates as the inputs of another NAND gate
pass the inputs through an nand gate and again pass them through inverter,which is again formed by an nand gate
An AND gate
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
A standard NOT gate will have just one input. It will change its value to the opposite digital value for the output.
The output of an AND gate is set only when all of its inputs are set, and when switches are wired together in series, current can flow only when all of the switches are on.
A: two
That package contains four 2-input NAND gates with Schmitt-trigger inputs.
A: OR gates does not perform addition or any other mathematical function but rather makes logical decision on true or false on two [ more] inputs both input are false then the output will be false "0" that is the only premise for an OR gate. The AND gate perform another logic function such as both [more inputs] must be true "1" for the output to be true/ mathematical calculations are achieved by using binary numbers that a machine [computer] understand
A: TTL-DTL-RTL are family of gates called by the name. Example TTL means Tran. trans. logic. It refers to the inputs for these gates as the type. T= Transistor D=Diode R=Resistor While they do perform the same function their characteristics in performance varies greatly.
pass the inputs through an nand gate and again pass them through inverter,which is again formed by an nand gate
Pretty much referring in Electronics, Logic gates are Very Useful fundamentals or if you want responsible for any type of digital circuit that can ever be built! in facts they are consist of two main activities: A. a Logic gate has both of inputs and outputs.B. They also are implemented for each other simply to perform any type of circuit depending on they way you build the circuit and how you want it to function ( for instance: acting together in a circuit one another for different role, they easily achieve what the user has implement them to function )Nshuti.
An AND gate
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
-- Take two 2-input AND gates.-- Attach 'y' to one input of one gate, and jumper that point toone input of the other gate.-- Attach 'x' to the free input of one gate, and attach 'z' to thefree input of the other gate.-- Attach the outputs of both gates to the inputs of a single OR gate.-- The output of the OR gate is the Boolean function ( XY + YZ ).=======================================Better implementation (faster, cheaper, easier to build, less hardware to fail):-- Attach 'x' and 'z' to the inputs of a single OR gate.-- Attach 'y' and the output of the OR gate to the two inputs of a single AND gate.-- The output of the AND gate is the same Boolean function.
A "Nand" gate is an "And" gate with an "Inverter" added to its output. To get a logic 1 output from a "Nand" gate, you need a logic 0 on both of its inputs. If I understand your question correctly, you have three "Nand" gates. Presumably the outputs of two of them are connected to the inputs of the third. Logic 1 at both inputs of the first two "Nand" gates will produce a logic 0 output from both of them. The two logic 0's are fed to the inputs of the third "Nand" gate producing a logic 0 output from the third "Nand" gate.
AND gate is A.B If two not gates are added at both inputs of and gate then output becomes A'.B' which is equal to (A+B)' by DeMorgan's law. hence the nor gate is formed Update: Put more simply, invert A and B by attaching A to both inputs of one NOR and attaching B to both inputs of another NOR, then NOR the results of the previous two NOR gates. Total of three NOR gates in a two-level implementation. NAND can obviously be created by inverting the result.
By using 5 NOR gates, we can implements half-subtractor. The inputs for 1st NOR gate are A and B, for 2nd NOR gate inputs are the output of 1st NOR gate and A input, for 3rd NOR gate inputs are the output of 1st NOR gate and B input, for 4th NOR gate the inputs are gates 2 and 3, and for last gate input is the output of the 4th gate.