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Because in many statements you use HL as a pointer to memory data, eg:
LD B,(HL)
SUB A,(HL)
LD (HL),E
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Assembly language pgm to find sum of n numbers?
C100 LXI H C200 21 ; Load the HL register pair immediately C101 00 ; C102 C2 ; C103 MOV B M 46 ; Move the memory content (Total number of data) in to B register C104 MVI C 00 0E ; Initialize the C register with 00 H C 105 00 ; C106 SUB A 97 ; Clear the ac cumulator C107 INX H 23 ; Increment the HL register pair (to get the next input data) C108 MOV A M 7E ; Move the memory content in to accumulator C109 DCR B 05 ; Decrement the B register c o n tent C10A INX H 23 ; Increment the HL register pair C10B ADD M 86 ; Add the memory content to accumulator C10C JNC C110 D2 ; Jump if carry = 0, to C110 H C10D 10 ; C10E C1 ; C10F INR C 0C ; Increment the C register content C110 DCR B 05 ; Decrement the B register content C111 JNZ C10A C2 ; Jump if no zero to C10A H C112 0A ; C113 C1 ; C114 STA C300 32 ; Store the accumulator content (sum) at C300 H C115 00 ; C116 C3 ; C117 MOV A C 79 ; Move the C register content to accumulator C118 STA C301 32 ; Store the accumulator content ( carry ) at C300 H C119 01 ; C11A C3 ; C11B HL T 76 ; Halt the exection
What is h-L in the Intel 8085?
HL is a register pair that is used to store 16-bit data in 8085 Microprocessor
74 basic instructions set in 8085 microprocessor?
8085 Instruction Set Page 1 8085 INSTRUCTION SET INSTRUCTION DETAILS DATA TRANSFER INSTRUCTIONS Opcode Operand Description Copy from source to destination MOV Rd, Rs This instruction copies the contents of the source M, Rs register into the destination register; the contents of Rd, M the source register are not altered. If one of the operands is a memory location, its location is specified by the contents of the HL registers. Example: MOV B, C or MOV B, M Move immediate 8-bit MVI Rd, data The 8-bit data is stored in the destination register or M, data memory. If the operand is a memory location, its location is specified by the contents of the HL registers. Example: MVI B, 57H or MVI M, 57H Load accumulator LDA 16-bit address The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator. The contents of the source are not altered. Example: LDA 2034H Load accumulator indirect LDAX B/D Reg. pair The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered. Example: LDAX B Load register pair immediate LXI Reg. pair, 16-bit data The instruction loads 16-bit data in the register pair designated in the operand. Example: LXI H, 2034H or LXI H, XYZ Load H and L registers direct LHLD 16-bit address The instruction copies the contents of the memory location pointed out by the 16-bit address into register L and copies the contents of the next memory location into register H. The contents of source memory locations are not altered. Example: LHLD 2040H 8085 Instruction Set Page 2 Store accumulator direct STA 16-bit address The contents of the accumulator are copied into the memory location specified by the operand. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. Example: STA 4350H Store accumulator indirect STAX Reg. pair The contents of the accumulator are copied into the memory location specified by the contents of the operand (register pair). The contents of the accumulator are not altered. Example: STAX B Store H and L registers direct SHLD 16-bit address The contents of register L are stored into the memory location specified by the 16-bit address in the operand and the contents of H register are stored into the next memory location by incrementing the operand. The contents of registers HL are not altered. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. Example: SHLD 2470H Exchange H and L with D and E XCHG none The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. Example: XCHG Copy H and L registers to the stack pointer SPHL none The instruction loads the contents of the H and L registers into the stack pointer register, the contents of the H register provide the high-order address and the contents of the L register provide the low-order address. The contents of the H and L registers are not altered. Example: SPHL Exchange H and L with top of stack XTHL none The contents of the L register are exchanged with the stack location pointed out by the contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1); however, the contents of the stack pointer register are not altered. Example: XTHL 8085 Instruction Set Page 3 Push register pair onto stack PUSH Reg. pair The contents of the register pair designated in the operand are copied onto the stack in the following sequence. The stack pointer register is decremented and the contents of the highorder register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. Example: PUSH B or PUSH A Pop off stack to register pair POP Reg. pair The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (C, E, L, status flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. Example: POP H or POP A Output data from accumulator to a port with 8-bit address OUT 8-bit port address The contents of the accumulator are copied into the I/O port specified by the operand. Example: OUT F8H Input data to accumulator from a port with 8-bit address IN 8-bit port address The contents of the input port designated in the operand are read and loaded into the accumulator. Example: IN 8CH 8085 Instruction Set Page 4 ARITHMETIC INSTRUCTIONS Opcode Operand Description Add register or memory to accumulator ADD R The contents of the operand (register or memory) are M added to the contents of the accumulator and the result is stored in the accumulator. If the operand is a memory location, its location is specified by the contents of the HL registers. All flags are modified to reflect the result of the addition. Example: ADD B or ADD M Add register to accumulator with carry ADC R The contents of the operand (register or memory) and M the Carry flag are added to the contents of the accumulator and the result is stored in the accumulator. If the operand is a memory location, its location is specified by the contents of the HL registers. All flags are modified to reflect the result of the addition. Example: ADC B or ADC M Add immediate to accumulator ADI 8-bit data The 8-bit data (operand) is added to the contents of the accumulator and the result is stored in the accumulator. All flags are modified to reflect the result of the addition. Example: ADI 45H Add immediate to accumulator with carry ACI 8-bit data The 8-bit data (operand) and the Carry flag are added to the contents of the accumulator and the result is stored in the accumulator. All flags are modified to reflect the result of the addition. Example: ACI 45H Add register pair to H and L registers DAD Reg. pair The 16-bit contents of the specified register pair are added to the contents of the HL register and the sum is stored in the HL register. The contents of the source register pair are not altered. If the result is larger than 16 bits, the CY flag is set. No other flags are affected. Example: DAD H 8085 Instruction Set Page 5 Subtract register or memory from accumulator SUB R The contents of the operand (register or memory ) are M subtracted from the contents of the accumulator, and the result is stored in the accumulator. If the operand is a memory location, its location is specified by the contents of the HL registers. All flags are modified to reflect the result of the subtraction. Example: SUB B or SUB M Subtract source and borrow from accumulator SBB R The contents of the operand (register or memory ) and M the Borrow flag are subtracted from the contents of the accumulator and the result is placed in the accumulator. If the operand is a memory location, its location is specified by the contents of the HL registers. All flags are modified to reflect the result of the subtraction. Example: SBB B or SBB M Subtract immediate from accumulator SUI 8-bit data The 8-bit data (operand) is subtracted from the contents of the accumulator and the result is stored in the accumulator. All flags are modified to reflect the result of the subtraction. Example: SUI 45H Subtract immediate from accumulator with borrow SBI 8-bit data The 8-bit data (operand) and the Borrow flag are subtracted from the contents of the accumulator and the result is stored in the accumulator. All flags are modified to reflect the result of the subtracion. Example: SBI 45H Increment register or memory by 1 INR R The contents of the designated register or memory) are M incremented by 1 and the result is stored in the same place. If the operand is a memory location, its location is specified by the contents of the HL registers. Example: INR B or INR M Increment register pair by 1 INX R The contents of the designated register pair are incremented by 1 and the result is stored in the same place. Example: INX H 8085 Instruction Set Page 6 Decrement register or memory by 1 DCR R The contents of the designated register or memory are M decremented by 1 and the result is stored in the same place. If the operand is a memory location, its location is specified by the contents of the HL registers. Example: DCR B or DCR M Decrement register pair by 1 DCX R The contents of the designated register pair are decremented by 1 and the result is stored in the same place. Example: DCX H Decimal adjust accumulator DAA none The contents of the accumulator are changed from a binary value to two 4-bit binary coded decimal (BCD) digits. This is the only instruction that uses the auxiliary flag to perform the binary to BCD conversion, and the conversion procedure is described below. S, Z, AC, P, CY flags are altered to reflect the results of the operation. If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC flag is set, the instruction adds 6 to the low-order four bits. If the value of the high-order 4-bits in the accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6 to the high-order four bits. Example: DAA 8085 Instruction Set Page 7 BRANCHING INSTRUCTIONS Opcode Operand Description Jump unconditionally JMP 16-bit address The program sequence is transferred to the memory location specified by the 16-bit address given in the operand. Example: JMP 2034H or JMP XYZ Jump conditionally Operand: 16-bit address The program sequence is transferred to the memory location specified by the 16-bit address given in the operand based on the specified flag of the PSW as described below. Example: JZ 2034H or JZ XYZ Opcode Description Flag Status JC Jump on Carry CY = 1 JNC Jump on no Carry CY = 0 JP Jump on positive S = 0 JM Jump on minus S = 1 JZ Jump on zero Z = 1 JNZ Jump on no zero Z = 0 JPE Jump on parity even P = 1 JPO Jump on parity odd P = 0 8085 Instruction Set Page 8 Unconditional subroutine call CALL 16-bit address The program sequence is transferred to the memory location specified by the 16-bit address given in the operand. Before the transfer, the address of the next instruction after CALL (the contents of the program counter) is pushed onto the stack. Example: CALL 2034H or CALL XYZ Call conditionally Operand: 16-bit address The program sequence is transferred to the memory location specified by the 16-bit address given in the operand based on the specified flag of the PSW as described below. Before the transfer, the address of the next instruction after the call (the contents of the program counter) is pushed onto the stack. Example: CZ 2034H or CZ XYZ Opcode Description Flag Status CC Call on Carry CY = 1 CNC Call on no Carry CY = 0 CP Call on positive S = 0 CM Call on minus S = 1 CZ Call on zero Z = 1 CNZ Call on no zero Z = 0 CPE Call on parity even P = 1 CPO Call on parity odd P = 0 8085 Instruction Set Page 9 Return from subroutine unconditionally RET none The program sequence is transferred from the subroutine to the calling program. The two bytes from the top of the stack are copied into the program counter, and program execution begins at the new address. Example: RET Return from subroutine conditionally Operand: none The program sequence is transferred from the subroutine to the calling program based on the specified flag of the PSW as described below. The two bytes from the top of the stack are copied into the program counter, and program execution begins at the new address. Example: RZ Opcode Description Flag Status RC Return on Carry CY = 1 RNC Return on no Carry CY = 0 RP Return on positive S = 0 RM Return on minus S = 1 RZ Return on zero Z = 1 RNZ Return on no zero Z = 0 RPE Return on parity even P = 1 RPO Return on parity odd P = 0 8085 Instruction Set Page 10 Load program counter with HL contents PCHL none The contents of registers H and L are copied into the program counter. The contents of H are placed as the high-order byte and the contents of L as the low-order byte. Example: PCHL Restart RST 0-7 The RST instruction is equivalent to a 1-byte call instruction to one of eight memory locations depending upon the number. The instructions are generally used in conjunction with interrupts and inserted using external hardware. However these can be used as software instructions in a program to transfer program execution to one of the eight locations. The addresses are: Instruction Restart Address RST 0 0000H RST 1 0008H RST 2 0010H RST 3 0018H RST 4 0020H RST 5 0028H RST 6 0030H RST 7 0038H The 8085 has four additional interrupts and these interrupts generate RST instructions internally and thus do not require any external hardware. These instructions and their Restart addresses are: Interrupt Restart Address TRAP 0024H RST 5.5 002CH RST 6.5 0034H RST 7.5 003CH 8085 Instruction Set Page 11 LOGICAL INSTRUCTIONS Opcode Operand Description Compare register or memory with accumulator CMP R The contents of the operand (register or memory) are M compared with the contents of the accumulator. Both contents are preserved . The result of the comparison is shown by setting the flags of the PSW as follows: if (A) < (reg/mem): carry flag is set if (A) = (reg/mem): zero flag is set if (A) > (reg/mem): carry and zero flags are reset Example: CMP B or CMP M Compare immediate with accumulator CPI 8-bit data The second byte (8-bit data) is compared with the contents of the accumulator. The values being compared remain unchanged. The result of the comparison is shown by setting the flags of the PSW as follows: if (A) < data: carry flag is set if (A) = data: zero flag is set if (A) > data: carry and zero flags are reset Example: CPI 89H Logical AND register or memory with accumulator ANA R The contents of the accumulator are logically ANDed with M the contents of the operand (register or memory), and the result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation. CY is reset. AC is set. Example: ANA B or ANA M Logical AND immediate with accumulator ANI 8-bit data The contents of the accumulator are logically ANDed with the 8-bit data (operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of the operation. CY is reset. AC is set. Example: ANI 86H 8085 Instruction Set Page 12 Exclusive OR register or memory with accumulator XRA R The contents of the accumulator are Exclusive ORed with M the contents of the operand (register or memory), and the result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: XRA B or XRA M Exclusive OR immediate with accumulator XRI 8-bit data The contents of the accumulator are Exclusive ORed with the 8-bit data (operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: XRI 86H Logical OR register or memory with accumulaotr ORA R The contents of the accumulator are logically ORed with M the contents of the operand (register or memory), and the result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: ORA B or ORA M Logical OR immediate with accumulator ORI 8-bit data The contents of the accumulator are logically ORed with the 8-bit data (operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: ORI 86H Rotate accumulator left RLC none Each binary bit of the accumulator is rotated left by one position. Bit D7 is placed in the position of D0 as well as in the Carry flag. CY is modified according to bit D7. S, Z, P, AC are not affected. Example: RLC Rotate accumulator right RRC none Each binary bit of the accumulator is rotated right by one position. Bit D0 is placed in the position of D7 as well as in the Carry flag. CY is modified according to bit D0. S, Z, P, AC are not affected. Example: RRC 8085 Instruction Set Page 13 Rotate accumulator left through carry RAL none Each binary bit of the accumulator is rotated left by one position through the Carry flag. Bit D7 is placed in the Carry flag, and the Carry flag is placed in the least significant position D0. CY is modified according to bit D7. S, Z, P, AC are not affected. Example: RAL Rotate accumulator right through carry RAR none Each binary bit of the accumulator is rotated right by one position through the Carry flag. Bit D0 is placed in the Carry flag, and the Carry flag is placed in the most significant position D7. CY is modified according to bit D0. S, Z, P, AC are not affected. Example: RAR Complement accumulator CMA none The contents of the accumulator are complemented. No flags are affected. Example: CMA Complement carry CMC none The Carry flag is complemented. No other flags are affected. Example: CMC Set Carry STC none The Carry flag is set to 1. No other flags are affected. Example: STC 8085 Instruction Set Page 14 CONTROL INSTRUCTIONS Opcode Operand Description No operation NOP none No operation is performed. The instruction is fetched and decoded. However no operation is executed. Example: NOP Halt and enter wait state HLT none The CPU finishes executing the current instruction and halts any further execution. An interrupt or reset is necessary to exit from the halt state. Example: HLT Disable interrupts DI none The interrupt enable flip-flop is reset and all the interrupts except the TRAP are disabled. No flags are affected. Example: DI Enable interrupts EI none The interrupt enable flip-flop is set and all interrupts are enabled. No flags are affected. After a system reset or the acknowledgement of an interrupt, the interrupt enable flipflop is reset, thus disabling the interrupts. This instruction is necessary to reenable the interrupts (except TRAP). Example: EI 8085 Instruction Set Page 15 Read interrupt mask RIM none This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit. The instruction loads eight bits in the accumulator with the following interpretations. Example: RIM Set interrupt mask SIM none This is a multipurpose instruction and used to implement the 8085 interrupts 7.5, 6.5, 5.5, and serial data output. The instruction interprets the accumulator contents as follows. Example: SIM
What is the definition of wire called a shielded pair?
When you get wire that is a shielded pair, you get two individual conductors that are each individually insulated from each other, and the pair is twisted and wrapped with a thin layer of foil to provide electromagnetic shielding to the pair. Occationally you'll see the pair is surrounded with a braided shield, but not commonly. That's your shielded pair.
What is the difference between malloc and new other than syntax?
Click on the link to your right for the answer.Answerboth malloc and new functions are used for dynamic memory allocations and the basic difference is: malloc requires a special "typecasting" when it allocates memory for eg. if the pointer used is the char pointer then after the processor allocates memory then this allocated memory needs to be typecasted to char pointer i.e (char*).but new does not requires any typecasting. Also, free is the keyword used to free the memory while using malloc and delete the keyword to free memory while using new, otherwise this will lead the memory leak. AnswerBesides the basic syntactical difference: malloc is a C function which will allocate the amount of memory you ask and that's it. new is a C++ operator which will allocate memory AND call the constructor of the class for which's object memory is being allocated. Similarily, free is a C function which will free up the memory allocated. but delete is a C++ operator which will free up the allocated memory AND call the destructor of the object.Answermalloc in a function and new is an operator, and its a good programming practice to use an operator instead of functions, because function itself requires some time to be executed whenever that particular function is called. so the main difference is that we use operators instead of malloc because of the TIME CONSTRAINT. Answer1.malloc requires the type casting during decleration , where as new doesn't needed the type casting during decleration 2. when ever we use new for allocating memory along with this it calls the constructor of the class for which object memory is allocated 3. in case of malloc free is the word used to clear the memory, where as delete is the format used in case of new to free the memory after usage 4. malloc is function, where as new is operator..so the time required for execution is less in case of new (it being a operator) as compared to malloc(it being a function) Answer1. malloc is a function call, while new is an operator. This difference is syntactic; behind the scenes, they both perform pretty much the same work to allocate the memory, and operator new also invokes any required constructors. There is a commonplace urban myth that operators are somehow faster in your code than functions; this is not correct, as any operator (except for mathematical operations that correspond directly to a single machine-code instruction) invocation amounts to a function call in any case. 2. malloc can fail, and returns a NULL pointer if memory is exhausted. Operator new never returns a NULL pointer, but indicates failure by throwing an exception instead. There is also a nothrow() version of operator new, which does return NULL on failure.
Why H-L pair register in 8085 is called special purpose register?
hl pair holds the address of the location pointed by the memory pointer M
What is register addressing mode?
If 8 or 16 bit data is required for executing the instruction present in register/register pair and named of register/register pair is given along the register.this instruction is called register addressing mode instruction.for example:MOV B,A
What is the full form of LDAX?
The full form of LDAX is load accumulator from memory pointed by extended register denoted as "rp". It occupies only one byte in memory and the target address is contained in either the BC or DE register pair.
What is difference between INR and INX instruction?
INR increment the content of register/memory by 1and result is stored in same place. INX increment the register pair by 1(no flags are affected)
What is the purpose of INSTRUCTION REGISTER in 8085 Microprocessor?
In 8085 general purpose registers are used to hold data like any other registers. In 8085 there are six types of special registers called general purpose registers. The general purpose registers in 8085 are B, C, D, E, H and L. Each register can hold 8 bit data. Apart from above functions these registers can also be used to work in pairs to hold 16 bit data. They can work in pairs such as B-C, D-E, H-L to store 16 bit data. The H-L pair work as a memory pointer. A memory pointer holds the address of a particular memory location. They can store 16 bit address as they work in pairs.
How many registers are there in an 8085 microprocessor?
Accumulator or A register is an 8-bit register used for arithmetic, logic, I/O and load/store operations. Flag is an 8-bit register containing 5 1-bit flags: * Sign - set if the most significant bit of the result is set. * Zero - set if the result is zero. * Auxiliary carry - set if there was a carry out from bit 3 to bit 4 of the result. * Parity - set if the parity (the number of set bits in the result) is even. * Carry - set if there was a carry during addition, or borrow during subtraction/comparison. General registers: * 8-bit B and 8-bit C registers can be used as one 16-bit BC register pair. When used as a pair the C register contains low-order byte. Some instructions may use BC register as a data pointer. * 8-bit D and 8-bit E registers can be used as one 16-bit DE register pair. When used as a pair the E register contains low-order byte. Some instructions may use DE register as a data pointer. * 8-bit H and 8-bit L registers can be used as one 16-bit HL register pair. When used as a pair the L register contains low-order byte. HL register usually contains a data pointer used to reference memory addresses. Stack pointer is a 16 bit register. This register is always incremented/decremented by 2. Program counter is a 16-bit register.
What is the difference between register addressing mode and register indirect addressing mode?
Ans: In the register addressing mode the operands are in registers which reside within the CPU. Register-mode instructions are 1-byte instructions and can be executed within the CPU without the need to reference memory for operands. But in the Register-indirect addressing mode the instruction specifies a register or a pair of registers in the processor whose contains give the address of the operand in memory. This mode uses 1-byte instructions even though the operand is in memory. Before using a register-indirect mode instruction, the programmer must ensure that the address of the operand is placed in the processor register with a previous transfer-type instruction. A reference to the register is then equivalent to specifying a memory address.
Why stax h not possible in 8085 microprocessor?
There is no STAX for HL register pair because the data transfer for STAX can be done through XCHG command. For ex: to transfer the data to the memory loaction specified by the HL pair we do as follows: XCHG STAX D for DE pair and BC pair we can directly do it using STAX
What is LDAX?
The LDAX/STAX instuctions in the 8085 load and store the accumulator. The target address used is contained in either the BC register pair (LDAX D), or the DE register pair (LDAX D).
What is HL pair in 8085 microprocessor?
HL is a register pair used to store 16 bit of data in 8085 microprocessor.
a set odered pair is called?
A set ordered pair is...called a set ordered pair
Does shld instruction affects the stackpointer in 8085?
SHLD...it basically stands for "store HL pair with data"... Explanation: HL pair is basically 2 registers H & L used together for specific purposes . This instruction stores the content of H & L registers into two consecutive memory locations (specified in the instruction). Better understand it with an example, SHLD 9000H means the processor will store the content of the "L" register in the location 9000H & that of the "H" register in the memory location 9001H. ROHIT DAS ECE CALCUTTA INSTITUTE OF TECHNOLOGY. (8287578929)
