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Is it possible to make any logic gate from only use of NOT gate?
Wiki User
∙ 13y ago
NAND and NOR logic gates are the two pillars of logic, in that all other types of Boolean logic gates (i.e., AND, OR, NOT, XOR, XNOR) can be created from a suitable network of just NAND or just NOR gate(s). They can be built from relays or transistors, or any other technology that can create an inverter and a two-input AND or OR gate.
Hence the NAND and NOR gates are called the universal gates, and this basic understanding should be observed by all undergraduate electrical engineering students.
But, for reasons of indulgence on the topic, lets go into a further explanation, of why NOT gates cannot be used. Take for example the NAND gate. Lets build its truth table.[1]
A0A1 | B
--------
00 | 1
01 | 1
10 | 1
11 | 0
States (00), and (11), can be implemented using a 2-input NOT gate.
A0..A1 =|>- B
Complications arise, however with building a solution for states (01), and (10). The following is not a viable solution
A0 ---|>-----|>--- B (Not viable)
The problem has to do with the limited memory of the system:
Imagine two signal paths, running in parallel, to a mutual destination
Branch 1 - ..---|>-----|>---..
Branch 2 - ..---|>----------..
If each inverter ( NOT gate ) has to manipulate ( invert ) the signal, then a gate delay Dgate is introduced by each gate. Thus the 1st branch will have a gate delay of 2; whereas the 2nd branch only has a gate delay of 1.
The faster branch ( Branch 2 ) will usually reach its destination first, which inherently introduces timingissues.
This can happen with other forms of TTL, such with NAND gates. But the solution is to introduce a latch. A latch is essentially a 1-bit memory cell. [1]
Branch 1 - ..---|>-----|>--..
Branch 2 - ..---|>-----(L)--..
..But then how do you build a latch, if a latch is composed of TTL NAND gates [2], and the initial timing issues, involving these gates, hasn't been resolved?
And it is this contradiction which thus preempts the use of a NOT gate as the foundation for a homeomorphic system.
There has been a proposed solution, in which a solid-state capacitor is substituted in place of a latch ( I leave it up to the reader to decide for himself ), it appears to be proprietary technology in Iran. If you have $31.50, you can read their paper.[3]
REFERENCES
[1] - See related links ( on bottom of this page )
[2] - See related links
[3] - See related links
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∙ 13y ago
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Why NOR gate is called universal gate?
That title of "Universal Gate" is reserved for NAND gates because you can build all possible logic using only NAND logic . You can build even other basic logic like AND, OR and NOT using NAND.
When is that the NA ND logic gate can function as a NOT logic gate?
The NAND gate has two or more inputs, and one output. This output is the complement of the AND of all the bits and will only be 0 if all the inputs are 1.A NOT gate on the other hand has only 1 input, and the output is the complement of this input.So to make a NAND gate into a NOT gate, we should tie (short, connect to same value) all the inputs of the NAND gate. At the output we would have the complement of the signal given at the tied inputs.This way we have a NOT gate from a NAND gate.
What logic gate might be called the all or nothing gate why?
AND gate is called an all or nothing gate.Because it produces a 1 only in one case when all its inputs are "1". In all other cases its output is a "zero".
Operation of XOR gate?
An XOR (exclusive OR gate) has two inputs and one output. If only one of the inputs is at level 1, then the output is 1 otherwise the output is 0. The truth table looks like this: A B Out0 0 00 1 11 0 11 1 0 Exclusive OR represents in logic what "or" means in English; for example, if asked if you want tea or coffee it's usually meant that you can have one or the other - not both.
Device a circuit to perform OR logic using only NOR gate?
Use two NOR gates. Tie the output of the first to both (or all) inputs of the second. A logic one at any input of the first produces a logic one at the output of the second which is a standard OR.
Why universal gate is called universal?
That title of "Universal Gate" is reserved for NAND gates because you can build all possible logic using only NAND logic . You can build even other basic logic like AND, OR and NOT using NAND.
What are the diode logic gate?
A logic gate composed only of diodes and resistors. The only types are AND gates and OR gates. However the number of layers of logic that can be implemented are severely limited due to losses in these gates.
Why NOR gate is called universal gate?
That title of "Universal Gate" is reserved for NAND gates because you can build all possible logic using only NAND logic . You can build even other basic logic like AND, OR and NOT using NAND.
Can you design or gate using and gate?
Only if you decide to work with negative logic throughout the circuit.
When is that the NA ND logic gate can function as a NOT logic gate?
The NAND gate has two or more inputs, and one output. This output is the complement of the AND of all the bits and will only be 0 if all the inputs are 1.A NOT gate on the other hand has only 1 input, and the output is the complement of this input.So to make a NAND gate into a NOT gate, we should tie (short, connect to same value) all the inputs of the NAND gate. At the output we would have the complement of the signal given at the tied inputs.This way we have a NOT gate from a NAND gate.
What is a four input and gate?
A four input and gate is a logic gate with four inputs. The output is true only when all four inputs are true.
What is system logic?
A positive logic system will output true only when the input is true. A negative logic system will output true only when the input is false. The NOT logic gate is an example of a negative logic system. That is, NOT( false ) will output true.
What is a AND gate in physics?
An AND gate is a digital logic gate. Only if both of the inputs to the gate are "1", then the ouput of the gate will be "1" . If both of the inputs to the gate are "0" or if only one input to the gate is "1", then the output of the gate will be "0".
What are the blocks in logic gates?
The blocks in a logic gate depends on the logic family we use.A logic gate is designed using a specific logic family. The logic families can be DTL, TTL, CMOS etc.The blocks are different for different logic families.The various blocks in various logic families are:Diode logic: diodes and resistorsDTL logic : diodes and resistorsTTL logic : transistors and resistorsNMOS logic: only NMOS FETsPMOS logic: Only PMOS FETsCMOS logic: Both NMOS and PMOS FETsBiCMOS Logic: both transistors and FETs.
What is negative logic system?
A positive logic system will output true only when the input is true. A negative logic system will output true only when the input is false. The NOT logic gate is an example of a negative logic system. That is, NOT( false ) will output true.
Why we use only ''0'' and ''1'' in logic?
Binary logic has only two possible values:TRUE or FALSE and these are coded as 1 and 0.
How nand gate acts as a universal gate?
A universal gate is a gate which can implement any Boolean function without need touse any other gate type.The NAND and NOR gates are universal gates.In practice, this is advantageous since NAND and NOR gates are economical andeasier to fabricate and are the basic gates used in all IC digital logic families.In fact, an AND gate is typically implemented as a NAND gate followed by aninverter not the other way around!!Likewise, an OR gate is typically implemented as a NOR gate followed by an inverternot the other way around!!A universal gate is a gate which can implement any Boolean function without need touse any other gate type.The NAND and NOR gates are universal gates.In practice, this is advantageous since NAND and NOR gates are economical andeasier to fabricate and are the basic gates used in all IC digital logic families.In fact, an AND gate is typically implemented as a NAND gate followed by aninverter not the other way around!!Likewise, an OR gate is typically implemented as a NOR gate followed by an inverternot the other way around!!can be combined to produce AND, OR,NOT,XORand XNOR gates
