Why is the 8086 memory set up as 2 byte wide banks?
Because the 8086 is a 16 bit processor. Memory is organized as 512 MW of memory, or 1024 MB of memory.
How can interrupt be generated?
when an i/o device is ready to do the process with cpu and the cpu not is not know the status of.. trhe i/o device,then i/o device sends a request to service it
How many memory address does this number of address lines allow the 8086 to access directly?
The 8086/8088 has 20 address lines. It can access 220, or 1MB, or 1,048,576 bytes of memory.
Why 2 gnd are used in microprocessor 8086?
Two ground pins are used in the 8086 microprocessor to increase the bus pull-down current capacity.
What are the disadvantages of bit slice microprocessor?
The disadvantage of the bit slice microprocessor is that it is slow that it why it was slow with earlier processors.
What is the assembly language program for GCD of two 16 bit unsigned integers using Intel 8086?
alp for lcm of a no
Push and pop instruction of 8086 microprocessor?
I am not sure about 8086, but I can tell you the whole procedure in 8085.
PUSH instruction always pushes two bytes of data i.e. total 16 bits.
Example:
Assume that Stack is already initialized and SP is at 2008 address location. Then PUSH B instruction will have following steps:
1) The stack pointer (SP) will be pointing to the uppermost position of the stack (actually stack works in opposite order in terms of Addresses. e.g. if SP is now at address 2008, then PUSH instruction will store the contents on 2007 & 2006).
2) The contents of register B & C will be saved on to the stack such that contents of register B will be at 2007 & that of C will be at 2006 address location.
3) The SP is now modified to 2006.
How many address lines are required to access 1MB RAM using microprocessor 8086?
The 8086/8088 microprocessor has a 20 bit address bus, so the number of memory locations it can address is 220 or 1,048,576.
What is the difference between shall carry and may carry?
Shall carry means that there is a 100 percent chance the carrying will happen, and may carry means that there is a chance that the carrying will happen.
Clear Direction flag. SI and DI will be incremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW.
How many memory locations can be addressed by a μp with 16-address line?
A 16 bit address bus can select 65536 locations.
Is rst7.5 is a maskable interrupt in 8086?
No. RST7.5 is a maskable interrupt on the 8085, not the 8086/8088.
7F
What is architecture characteristic of risc and cisc?
character of risc
-load store architecture
-fixed length instruction
-hardwired control instruction
-pipelined implementation
character of cisc
-many instruction that access memory directly
-large number of addressing mode
-variable length instruction code
-support of misaligned accesses
answer by sachita pandey
Does Switches move data using physical addresses and routers move data using logical addresses?
............
i hit people with nikes
they eat my treadmarks GO NIKES
What do mean by mnemonics in microprocessors?
A mnemonic could be used anywhere, not just microprocessors. It's a group of letters so you could remember the parts of something.
Example: MRS. NERG
Movement, Reproduction, Sensitivity, Nutrition, Excretion, Respiration and Growth.
This is a mnemonic for the characteristics of living organisms.
What no of instruction will be execute by using only one clock pulse in 8085 microprocessor?
There are no instructions in the 8085 that execute in only one clock pulse. The minimum number of clock cycles is four; three for instruction fetch and one for instruction decode/execute.