Intel 8085

In order to interface more than 64K of memory using the 085, you would need an external address register, perhaps maintained by the 8255, which contained an offset register for part of the memory address space. This would be similar to how the 8086/8088 processors implemented expanded memory before using the 80386 and above processors.

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No. Pipeline processors are faster because they do not have to wait to fetch the next instruction, because the next instruction was "pre-fetched" already.

The instruction 20H is RIM (Read Interrupt Mask). The instruction 57H is MOV D,A. The contents of PC after these two instruction will be 2 greater than it was before starting.

expain the alternate fuction of port3

A minimum mode of 8086 configuration depicts a stand alone system of computer where no other processor is connected. This is similar to 8085 block diagram with the following difference. The Data transceiver block which helps the signals traveling a longer distance to get boosted up. Two control signals data transmit/ receive are connected to the direction input of transceiver (Transmitter/Receiver) and DEN* signal works as enable for this block. This is the same as Read cycle Timing Diagram except that the DT/R* line goes high indicating it is a Data Transmission operation for the processor to memory / peripheral. Again DEN* line goes low to validate data and WR* line goes low, indicating a Write operation In the maximum mode of operation of 8086, wherein either a numeric coprocessor of the type 8087 or another processor is interfaced with 8086. The Memory, Address Bus, Data Buses are shared resources between the two processors. The control signals for Maximum mode of operation are generated by the Bus Controller chip 8788. The three status outputs S0*, S1*, S2* from the processor are input to 8788. The outputs of the bus controller are the Control Signals, namely DEN, DT/R*, IORC*, IOWTC*, MWTC*, MRDC*, ALE etc. These control signals perform the same task as the minimum mode operation. However the DEN is an active HIGH signal which has to be converted to active LOW by means of an inverter.

On the stack.

The 8085 does not have an adjustable priority interrupt schema. You can only turn interrupts off, and mask certain interrupts, such as RST5.5, RST6.5, and RST7.5.

However, that said, you can implement a priority schema, of sorts, within these interrupts, including INTR, by using the SIM instruction. You can't change the basic priority but you can disable certain interrupts while others are being serviced, if you so choose.

Brownout reset is a circuit that forces the microprocessor to reset if there is a short interruption of power - one that is long enough to disrupt operation, but not long enough to force a normal power on reset. It is usually a diode, resistor, and capacitor. The diode discharges the capacitor quickly when Vcc goes away, and the resistor charges the capacitor slower when Vcc comes back.

RST is simply the opcode chosen to represent the Restart instruction.

32 bit

The TMP register in the 8085 is used to hold temporary results of operations. You cannot directly manipulate it, so you should just pretend it is not there.

Absolutely not. A 2MHz 8-bit bus can transfer 2MB per second; a 4MHz 8-bit bus can transfer 4MB per second.

14*8=112 bits

What is the function of XRA instruction

There is no equation first of all because the given expression conveys no clue regarding destination or source......................?

Dyngate is a software program. This software program is a remote control software that enables the connection of 2 clients or partners.

A possible program to reverse a block of memory using the 8085...

PUSH F SAVE PROCESSOR STATE - OPTIONAL

PUSH B

PUSH D

PUSH H

LXI H,{address of block}

MOV D,H SAVE BLOCK ADDRESS

MOV E,H

MVI A,{size of block}

MOV C,A SAVE BLOCK SIZE

LOOP1:

MOV A,M GET DATA BYTE

PUSH F PUSH ON STACK

DCR C DECREMENT LOOP COUNT

XRA A TEST FOR END OF LOOP

CMP C

JNZ LOOP1

MOV H,D RESTORE BLOCK ADDRESS

MOV L,E

MOVE C,B RESTORE BLOCK SIZE

LOOP2:

POP F POP FROM STACK

MOV M,A PUT DATA BYTE

DCR C DECREMENT LOOP COUNT

XRA A TEST FOR END OF LOOP

CMP C

JNZ LOOP2

POP H RESTORE PROCESSOR STATE - OPTIONAL

POP D

POP B

POP F

Reset In:A low on this pin

1)Sets the program counter to zero.

2)Resets the interrupt enable and HLDA flip-flops.

3)Tristates the data bus,address bus nd control bus.

4)Affetcs the contents of processor's internal registers randomly.

Reset Out:This active high signal indicates that processor is being reset.This signal is synchronized to processor clock nd ir can be used to reset other devices connected in the system

---BalaG Mulate---

In general, the best way to change the flag register is to perform some operation that sets or clears flags. If you are careful, you can also push the flags onto the stack, manipulate the stored value, and then pop them back off. This is often the method used by a debugger to set the single step flag. When using this method, it is important to not set an inconsistent combination of flags.

referred to as fracture

http://en.wikipedia.org/wiki/Intel_8086

Just one.