Intel 8086 and 8088

The far procedure is used at the place where the function call is given in main program and function definition is given in sub program....

when interrupts requests arrive from two or more devices simultaneously , the process has to decide which request should be serviced first and which one should delayed. the processor takes the decision with the help of interrupt priorities.

The 8086/8088 is comprised of two major subsystems; the execution unit (EU), and the bus interface unit (BIU). They are relatively uncoupled, so they can run somewhat independently of each other. The EU is responsible for executing all of the instructions, while the BIU is responsible for processing the requests from the EU to and from external memory.

By separating these two major functions, Intel achieved two goals.

First, they were able to provide two versions of the same processor, one on an 8-bit bus (the 8088), and the other on a 16-bit bus (the 8086). Both EU's are the same, a 16-bit processor. The two flavors allow the system designer to choose the level of simplicity versus the level of performance.

Second, by decoupling the EU from the BIU, the BIU is now able to start fetching instructions from memory, while the EU is busy processing the previous instruction. Depending on the mix of instructions, the BIU is theoretically capable of having the next instruction already fetched and available by the time the EU needs it. This boosts performance.

In Microprocessor based system devices are connected n parallel through the bus in this situation it is required that one device is interact with the bus at a time .If more than one device make communication wid bus then more then one signal is places that they will produce damaging current known as Bus Contention.To avoid bus contention tristate buffer are placed between buses and peripheral...

How many no of address lines required in 1MB memory 11,16,22 or 24

u haven't specified correct options!

20 address lines will be required

because

1 MB is 1024 KB that is 1024*1024 Byte which is equivalent to (2^10)^2 bytes

if ur memory is Byte addressable then address lines required will be 20.

Nothing is waterproof, especially considering the high stresses involved in an airplane accident. The flight data recorder is water resistant. It is also designed to minimize the probability of data loss even if it does get wet internally.

The 8086/8088 has an internal 20-bit address bus and 16-bit data bus. Externally, the address bus is 20-bits, and the data bus is 16-bits for the 8086 and 8-bits for the 8088.
The data bus in the 8086 is 16 bits in size, while the address bus is 20.

I/O devices accept or release information at much slower rate than the microprocesor. Handshaking is the method that synchronize the I/O device with microprocessor.

It encounters the HLT instruction when there is not an endless loop or other things that are done endlessly.

the address that is obtained by applying any specified indexing or indirect addressing rules to specified address

Physical address: the MAC address; most commonly this is a type of unique number assigned to the network card. This can usually be considered fixed. This corresponds to layer 2 in the OSI model.

Logical address: an IP number assigned to a computer. These numbers can and will be changed, to have all the computers in a certain subnet have addresses that start (for example) with the same three octets (bytes). Layer 3 in the OSI model.

Port address: TCP or UDP port numbers. Used to distinguish different services or different conversations on a single computer (in other words, these are not addresses to distinguish different computers, but to distinguish different things within a single computer). Layer 4 in the OSI model.

Note: The above explanation uses the most commonly used protocols; but other protocols (other than IP, TCP or UDP) are also possible.

1) Fetch is the first of two stages involved in computer processing. The processor operates by processing instructions in what is called the "fetch/execute cycle." The processor fetches (reads from memory) an instruction and then, depending on the instruction, executes it (takes some further action with it, such as shifting bits to the right or left). Then it fetches the next instruction, and so forth.

The emitter of a transistor was placed a micrometer distance between two, so it was called a microprocessor. Technology advanced, and the distance was improved to nano meter. Still, they call it micro.

MAximum clock frequency of 8086 is 5MHZ.

8086 is a pipelined processor.

In 8086 to speed up the execution of a program,instruction fetching and executing the instruction are overlapped each other.This is a part of pipelined technique.

While executing a program, the microprocessor needs to access memory frequently to read instruction codes and data stored in memory and the interfacing circuit enables that access.

Which microprocessor accepts the program written for 8086 without any changes?

Physical address's are set at factory, the first 6 characters are that of the manufacturer.

The last 6 digits are unique to that product/device.

This is not a calculated field.

32 bit address line can access 4GB of memory. As 2^10 -> 1KB; 2^20 -> 2MB; 2^30 -> 1GB and so on.... 32 bit gives (2^30) * (2^2) = 1GB * 4 = 4GB;

It works on 8 bit

lower address lines has to be multiplexed with data lines

Appropriate control signals have to be generated to interface with memory and I/O devices

8 bit processors are slow

Memory is just 64 kb

By Anmol Bhardwaj

SUSCET Tangori Mohali ( India)