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Intel 8085
Introduced by Intel in 1977, the Intel 8085 is an 8-bit microprocessor that is binary-compatible with Intel 8080. It only requires a +5-volt power supply and has been used as a microcontroller.
1,493 Questions
How do you register in Bandmaster?
when apears to put the letters in the box.i put.but it don't register.and go to the same page.sorry my english,im portuguese
this is the memory that hold data temperaly and can be used in future
A check register is where you can keep track of your bank accoutns withdrawals and deposit information.
What is the differnce between timer and counter?
A counter accumulates an unknown quantity of external events over a known interval of time.
The measurement of interest is typically frequency when the events are periodic. If the events are random, the measurement involves event density over time.
A timer accumulates a series events of a known interval over an interval that is being measured.
The measurement of interest is typically the time elapsed between two events. If the start and stop events recur periodically, multiple measurements can be made and averaged, allowing for increased resolution.
Counter/timers in MPU's are typically just counters that count external events in counter mode and processor cycles in timer mode.
What was the purpose of the computer?
The word "computer" originally referred to a person who could do advanced math very quickly.
Later, the term was attached to the ENIAC (the first computer) which could do very advanced calculations in a short amount of time, but unfortunately occupied an entire gym-sized room.
The ENIAC led to the development of the Kenbak-1 (the first personal computer/calculator) and eventually to modern computers. Hence, the name was permanently attached to any device that could do advanced functions.
As this development took place, more tasks could be accomplished by computers including --but not limited to-- the storage, transfer, and viewing of information, playing games, and communication.
Computers are now used in many locations for specific purposes:
* On your desktop or lap * In planes, cars, trains, and other methods of transportation * In our home and cell phones
* In anything that has a screen * In satellites and other space craft (manned and unmanned)
What is data control language?
This is part of SQL. It allows you to control access to the database. 'DCL' commands include-
'GRANT' to allow specific users to perform specified tasks
'REVOKE' to cancel previously denied or granted permissions
GAYSON
Write a Program for ascending order in 8085 microprocessor?
Source program :
- MVI D, COUNT : Initialize counter
- MVI B, 00 : Initialize variable to store previous number
- MVI C, 01 : Initialize variable to store current number
- MOV A, B :[Add two numbers]
- BACK: ADD C :[Add two numbers]
- MOV B, C : Current number is now previous number
- MOV C, A : Save result as a new current number
- DCR D : Decrement count
- JNZ BACK : if count 0 go to BACK
- HLT : Stop.
How is the stack and stack pointer work?
A stack is a data structure in which last item inserted is taken out first . That's why they are known as LIFO (last in first out). Inserting an item in stack is termed as push and taking an item out from stack I s termed as pop. Stack pointer is the pointer that points to the top of the stack or that points the item at the top of the stack and help in adding or deleting the item from the top of stack.
How do you program the eeprom in pic16f877?
Part I
1. Input data to a pin on the PIC16f877 Micro controller
2. Take data from the pin and store it in a variable
3. Write data from the variable to EEPROM
Part II
1. Send the saved data from EEPROM to a Pin for output
Part II
1. Read the saved EEPROM data from partA in the debug window.
malcolmX
Write program to divide two number using 8085 microprocessor?
LDA 9000H
MOV B,A
LDA 9001H
MOV E,A
MVI C,00H
MOV A,B
LOOP : INR C
SUB E
JNZ LOOP
ADD E
DCR C
STA 9002H
MOV E,A
STA 9003H
Input the 2 numbers in 9000 & 9001.
Remainder stored in 9002, Quotient stored in 9003.
How do you write a program to arrange the numbers in ascending order using 8085 microprocessor?
MVI B, 09 : Initialize counter
START : LXI H, 2200H: Initialize memory pointer
MVI C, 09H : Initialize counter 2
BACK: MOV A, M : Get the number
INX H : Increment memory pointer
CMP M : Compare number with next number
JC SKIP : If less, don't interchange
JZ SKIP : If equal, don't interchange
MOV D, M
MOV M, A
DCX H
MOV M, D
INX H : Interchange two numbers
SKIP:DCR C : Decrement counter 2
JNZ BACK : If not zero, repeat
DCR B : Decrement counter 1
JNZ START
HLT : Terminate program execution
Difference between direct and indirect address instruction?
the different between direct and indirect adress instruction
In magnetism:
An eddy current is induced into a metal when magnetic lines of force move across it. A South pole causes circulating current in clockwise direction while a North pole causes current in counter-clockwise direction. These eddy currents thus buck the applied forces. Eddy currents are undesirable when induced into transformer cores causing power loss. Lamination of core material reduces current flow in the core. Current induced into the secondary winding of a transformer is a used to step-up or step-down voltages so that they can be of a correct size for end-use applications.
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When time-varying magnetic field is applied to electrical machines like transformers, a time-varying emf is induced in the transformer cores. A short circuit occurs at the molecular level in the core. Due to less resistance, a large current begins to flow in the core. This causes heating in the core. Actually the path of the current is circular resembling the circular waves in a pool of water (eddy). Hence these currents are called eddy currents.
In fluids:
In water flow, an eddy is a current that flows opposite the normal flow. If on a river, an eddy is a current that will flow upstream in a side channel filling it, even if the flow is in an opposite direction of the original flow. It is equivalent to a stream's water level rising because the river it feeds has more water in it than the stream, thus making the water flow upstream. It can also be an area that seems not to have a current at all.
A:
Just like there exists a magnetic path due to current (charge) flow in a conductor (direction given by right hand rule), the thing works other way as well...
When there is a flux path crossing a current conducting material, there exists current paths around the flux line on the conductor plane centered to the point where flux line meets the plane. These currents are eddy currents.
Commonly available in magnetic circuits. Laminations are done to minimize the ability to flow eddy currents.
Explain about pin diagram of 8051 micro controller?
The microcontrollers have an 8-bit data bus. They are capable of addressing 64K of program memory and a separate 64K of data memory. The 8051 has 4K of code memory implemented as on-chip Read Only Memory (ROM). The 8051 has 128 bytes of internal Random Access Memory (RAM). The 8051 has two timer/counters, a serial port, 4 general purpose parallel input/output ports, and interrupt control logic with five sources of interrupts. Besides internal RAM, the 8051 has various Special Function Registers (SFR), which are the control and data registers for on-chip facilities. The SFRs also include the accumulator, the B register, and the Program Status Word (PSW), which contains the CPU flags. << SHARMILA TANDEL (B.E) ELECTRONICS >>
Specify the crystal frequency required for an 8085 system to operate at 1.1mhz?
The crystal frquency in an 8085 system is twice the desired clock frequency, so a crystal of 2.2 MHz is required to operate at 1.1 MHz.
Note: Clock frequency is not the same as instructions per second, because the instructions in an 8085 take a variable number of clock cycles, between 4 and 18, to execute.
Give the program for finding smallest number in 8085 microprocessor?
.model small
.stack 64
.data
n1 db 08h,02h
res db ?
.code
mov ax,@data
mov ds,ax
mov cx,02
lea si,n1
mov bl,0ffh
mine:mov al,[si]
cmp al,bl
jne loop1
jmp loop2
loop1:jnc loop2
mov bl,al
inc si
loop mine
jmp exit
loop2:inc si
loop mine
exit:mov res,bl
hlt
end
What is a bus in a microprocessor?
A bus consists of wires which is used to transfer data either in serial or parallel transmission.
74 basic instructions set in 8085 microprocessor?
8085 Instruction Set Page 1
8085 INSTRUCTION SET
INSTRUCTION DETAILS
DATA TRANSFER INSTRUCTIONS
Opcode Operand Description
Copy from source to destination
MOV Rd, Rs This instruction copies the contents of the source
M, Rs register into the destination register; the contents of
Rd, M the source register are not altered. If one of the operands is a
memory location, its location is specified by the contents of
the HL registers.
Example: MOV B, C or MOV B, M
Move immediate 8-bit
MVI Rd, data The 8-bit data is stored in the destination register or
M, data memory. If the operand is a memory location, its location is
specified by the contents of the HL registers.
Example: MVI B, 57H or MVI M, 57H
Load accumulator
LDA 16-bit address The contents of a memory location, specified by a
16-bit address in the operand, are copied to the accumulator.
The contents of the source are not altered.
Example: LDA 2034H
Load accumulator indirect
LDAX B/D Reg. pair The contents of the designated register pair point to a memory
location. This instruction copies the contents of that memory
location into the accumulator. The contents of either the
register pair or the memory location are not altered.
Example: LDAX B
Load register pair immediate
LXI Reg. pair, 16-bit data The instruction loads 16-bit data in the register pair
designated in the operand.
Example: LXI H, 2034H or LXI H, XYZ
Load H and L registers direct
LHLD 16-bit address The instruction copies the contents of the memory location
pointed out by the 16-bit address into register L and copies
the contents of the next memory location into register H. The
contents of source memory locations are not altered.
Example: LHLD 2040H
8085 Instruction Set Page 2
Store accumulator direct
STA 16-bit address The contents of the accumulator are copied into the memory
location specified by the operand. This is a 3-byte instruction,
the second byte specifies the low-order address and the third
byte specifies the high-order address.
Example: STA 4350H
Store accumulator indirect
STAX Reg. pair The contents of the accumulator are copied into the memory
location specified by the contents of the operand (register
pair). The contents of the accumulator are not altered.
Example: STAX B
Store H and L registers direct
SHLD 16-bit address The contents of register L are stored into the memory location
specified by the 16-bit address in the operand and the contents
of H register are stored into the next memory location by
incrementing the operand. The contents of registers HL are
not altered. This is a 3-byte instruction, the second byte
specifies the low-order address and the third byte specifies the
high-order address.
Example: SHLD 2470H
Exchange H and L with D and E
XCHG none The contents of register H are exchanged with the contents of
register D, and the contents of register L are exchanged with
the contents of register E.
Example: XCHG
Copy H and L registers to the stack pointer
SPHL none The instruction loads the contents of the H and L registers into
the stack pointer register, the contents of the H register
provide the high-order address and the contents of the L
register provide the low-order address. The contents of the H
and L registers are not altered.
Example: SPHL
Exchange H and L with top of stack
XTHL none The contents of the L register are exchanged with the stack
location pointed out by the contents of the stack pointer
register. The contents of the H register are exchanged with
the next stack location (SP+1); however, the contents of the
stack pointer register are not altered.
Example: XTHL
8085 Instruction Set Page 3
Push register pair onto stack
PUSH Reg. pair The contents of the register pair designated in the operand are
copied onto the stack in the following sequence. The stack
pointer register is decremented and the contents of the highorder
register (B, D, H, A) are copied into that location. The
stack pointer register is decremented again and the contents of
the low-order register (C, E, L, flags) are copied to that
location.
Example: PUSH B or PUSH A
Pop off stack to register pair
POP Reg. pair The contents of the memory location pointed out by the stack
pointer register are copied to the low-order register (C, E, L,
status flags) of the operand. The stack pointer is incremented
by 1 and the contents of that memory location are copied to
the high-order register (B, D, H, A) of the operand. The stack
pointer register is again incremented by 1.
Example: POP H or POP A
Output data from accumulator to a port with 8-bit address
OUT 8-bit port address The contents of the accumulator are copied into the I/O port
specified by the operand.
Example: OUT F8H
Input data to accumulator from a port with 8-bit address
IN 8-bit port address The contents of the input port designated in the operand are
read and loaded into the accumulator.
Example: IN 8CH
8085 Instruction Set Page 4
ARITHMETIC INSTRUCTIONS
Opcode Operand Description
Add register or memory to accumulator
ADD R The contents of the operand (register or memory) are
M added to the contents of the accumulator and the result is
stored in the accumulator. If the operand is a memory
location, its location is specified by the contents of the HL
registers. All flags are modified to reflect the result of the
addition.
Example: ADD B or ADD M
Add register to accumulator with carry
ADC R The contents of the operand (register or memory) and
M the Carry flag are added to the contents of the accumulator
and the result is stored in the accumulator. If the operand is a
memory location, its location is specified by the contents of
the HL registers. All flags are modified to reflect the result of
the addition.
Example: ADC B or ADC M
Add immediate to accumulator
ADI 8-bit data The 8-bit data (operand) is added to the contents of the
accumulator and the result is stored in the accumulator. All
flags are modified to reflect the result of the addition.
Example: ADI 45H
Add immediate to accumulator with carry
ACI 8-bit data The 8-bit data (operand) and the Carry flag are added to the
contents of the accumulator and the result is stored in the
accumulator. All flags are modified to reflect the result of the
addition.
Example: ACI 45H
Add register pair to H and L registers
DAD Reg. pair The 16-bit contents of the specified register pair are added to
the contents of the HL register and the sum is stored in the
HL register. The contents of the source register pair are not
altered. If the result is larger than 16 bits, the CY flag is set.
No other flags are affected.
Example: DAD H
8085 Instruction Set Page 5
Subtract register or memory from accumulator
SUB R The contents of the operand (register or memory ) are
M subtracted from the contents of the accumulator, and the result
is stored in the accumulator. If the operand is a memory
location, its location is specified by the contents of the HL
registers. All flags are modified to reflect the result of the
subtraction.
Example: SUB B or SUB M
Subtract source and borrow from accumulator
SBB R The contents of the operand (register or memory ) and
M the Borrow flag are subtracted from the contents of the
accumulator and the result is placed in the accumulator. If
the operand is a memory location, its location is specified by
the contents of the HL registers. All flags are modified to
reflect the result of the subtraction.
Example: SBB B or SBB M
Subtract immediate from accumulator
SUI 8-bit data The 8-bit data (operand) is subtracted from the contents of the
accumulator and the result is stored in the accumulator. All
flags are modified to reflect the result of the subtraction.
Example: SUI 45H
Subtract immediate from accumulator with borrow
SBI 8-bit data The 8-bit data (operand) and the Borrow flag are subtracted
from the contents of the accumulator and the result is stored
in the accumulator. All flags are modified to reflect the result
of the subtracion.
Example: SBI 45H
Increment register or memory by 1
INR R The contents of the designated register or memory) are
M incremented by 1 and the result is stored in the same place. If
the operand is a memory location, its location is specified by
the contents of the HL registers.
Example: INR B or INR M
Increment register pair by 1
INX R The contents of the designated register pair are incremented
by 1 and the result is stored in the same place.
Example: INX H
8085 Instruction Set Page 6
Decrement register or memory by 1
DCR R The contents of the designated register or memory are
M decremented by 1 and the result is stored in the same place. If
the operand is a memory location, its location is specified by
the contents of the HL registers.
Example: DCR B or DCR M
Decrement register pair by 1
DCX R The contents of the designated register pair are decremented
by 1 and the result is stored in the same place.
Example: DCX H
Decimal adjust accumulator
DAA none The contents of the accumulator are changed from a binary
value to two 4-bit binary coded decimal (BCD) digits. This is
the only instruction that uses the auxiliary flag to perform the
binary to BCD conversion, and the conversion procedure is
described below. S, Z, AC, P, CY flags are altered to reflect
the results of the operation.
If the value of the low-order 4-bits in the accumulator is
greater than 9 or if AC flag is set, the instruction adds 6 to the
low-order four bits.
If the value of the high-order 4-bits in the accumulator is
greater than 9 or if the Carry flag is set, the instruction adds 6
to the high-order four bits.
Example: DAA
8085 Instruction Set Page 7
BRANCHING INSTRUCTIONS
Opcode Operand Description
Jump unconditionally
JMP 16-bit address The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand.
Example: JMP 2034H or JMP XYZ
Jump conditionally
Operand: 16-bit address
The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand based on
the specified flag of the PSW as described below.
Example: JZ 2034H or JZ XYZ
Opcode Description Flag Status
JC Jump on Carry CY = 1
JNC Jump on no Carry CY = 0
JP Jump on positive S = 0
JM Jump on minus S = 1
JZ Jump on zero Z = 1
JNZ Jump on no zero Z = 0
JPE Jump on parity even P = 1
JPO Jump on parity odd P = 0
8085 Instruction Set Page 8
Unconditional subroutine call
CALL 16-bit address The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand. Before
the transfer, the address of the next instruction after CALL
(the contents of the program counter) is pushed onto the stack.
Example: CALL 2034H or CALL XYZ
Call conditionally
Operand: 16-bit address
The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand based on
the specified flag of the PSW as described below. Before the
transfer, the address of the next instruction after the call (the
contents of the program counter) is pushed onto the stack.
Example: CZ 2034H or CZ XYZ
Opcode Description Flag Status
CC Call on Carry CY = 1
CNC Call on no Carry CY = 0
CP Call on positive S = 0
CM Call on minus S = 1
CZ Call on zero Z = 1
CNZ Call on no zero Z = 0
CPE Call on parity even P = 1
CPO Call on parity odd P = 0
8085 Instruction Set Page 9
Return from subroutine unconditionally
RET none The program sequence is transferred from the subroutine to
the calling program. The two bytes from the top of the stack
are copied into the program counter, and program execution
begins at the new address.
Example: RET
Return from subroutine conditionally
Operand: none
The program sequence is transferred from the subroutine to
the calling program based on the specified flag of the PSW as
described below. The two bytes from the top of the stack are
copied into the program counter, and program execution
begins at the new address.
Example: RZ
Opcode Description Flag Status
RC Return on Carry CY = 1
RNC Return on no Carry CY = 0
RP Return on positive S = 0
RM Return on minus S = 1
RZ Return on zero Z = 1
RNZ Return on no zero Z = 0
RPE Return on parity even P = 1
RPO Return on parity odd P = 0
8085 Instruction Set Page 10
Load program counter with HL contents
PCHL none The contents of registers H and L are copied into the program
counter. The contents of H are placed as the high-order byte
and the contents of L as the low-order byte.
Example: PCHL
Restart
RST 0-7 The RST instruction is equivalent to a 1-byte call instruction
to one of eight memory locations depending upon the number.
The instructions are generally used in conjunction with
interrupts and inserted using external hardware. However
these can be used as software instructions in a program to
transfer program execution to one of the eight locations. The
addresses are:
Instruction Restart Address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H
The 8085 has four additional interrupts and these interrupts
generate RST instructions internally and thus do not require
any external hardware. These instructions and their Restart
addresses are:
Interrupt Restart Address
TRAP 0024H
RST 5.5 002CH
RST 6.5 0034H
RST 7.5 003CH
8085 Instruction Set Page 11
LOGICAL INSTRUCTIONS
Opcode Operand Description
Compare register or memory with accumulator
CMP R The contents of the operand (register or memory) are
M compared with the contents of the accumulator. Both
contents are preserved . The result of the comparison is
shown by setting the flags of the PSW as follows:
if (A) < (reg/mem): carry flag is set
if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem): carry and zero flags are reset
Example: CMP B or CMP M
Compare immediate with accumulator
CPI 8-bit data The second byte (8-bit data) is compared with the contents of
the accumulator. The values being compared remain
unchanged. The result of the comparison is shown by setting
the flags of the PSW as follows:
if (A) < data: carry flag is set
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset
Example: CPI 89H
Logical AND register or memory with accumulator
ANA R The contents of the accumulator are logically ANDed with
M the contents of the operand (register or memory), and the
result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of the
operation. CY is reset. AC is set.
Example: ANA B or ANA M
Logical AND immediate with accumulator
ANI 8-bit data The contents of the accumulator are logically ANDed with the
8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY is reset. AC is set.
Example: ANI 86H
8085 Instruction Set Page 12
Exclusive OR register or memory with accumulator
XRA R The contents of the accumulator are Exclusive ORed with
M the contents of the operand (register or memory), and the
result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: XRA B or XRA M
Exclusive OR immediate with accumulator
XRI 8-bit data The contents of the accumulator are Exclusive ORed with the
8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: XRI 86H
Logical OR register or memory with accumulaotr
ORA R The contents of the accumulator are logically ORed with
M the contents of the operand (register or memory), and the
result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: ORA B or ORA M
Logical OR immediate with accumulator
ORI 8-bit data The contents of the accumulator are logically ORed with the
8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: ORI 86H
Rotate accumulator left
RLC none Each binary bit of the accumulator is rotated left by one
position. Bit D7 is placed in the position of D0 as well as in
the Carry flag. CY is modified according to bit D7. S, Z, P,
AC are not affected.
Example: RLC
Rotate accumulator right
RRC none Each binary bit of the accumulator is rotated right by one
position. Bit D0 is placed in the position of D7 as well as in
the Carry flag. CY is modified according to bit D0. S, Z, P,
AC are not affected.
Example: RRC
8085 Instruction Set Page 13
Rotate accumulator left through carry
RAL none Each binary bit of the accumulator is rotated left by one
position through the Carry flag. Bit D7 is placed in the Carry
flag, and the Carry flag is placed in the least significant
position D0. CY is modified according to bit D7. S, Z, P, AC
are not affected.
Example: RAL
Rotate accumulator right through carry
RAR none Each binary bit of the accumulator is rotated right by one
position through the Carry flag. Bit D0 is placed in the Carry
flag, and the Carry flag is placed in the most significant
position D7. CY is modified according to bit D0. S, Z, P, AC
are not affected.
Example: RAR
Complement accumulator
CMA none The contents of the accumulator are complemented. No flags
are affected.
Example: CMA
Complement carry
CMC none The Carry flag is complemented. No other flags are affected.
Example: CMC
Set Carry
STC none The Carry flag is set to 1. No other flags are affected.
Example: STC
8085 Instruction Set Page 14
CONTROL INSTRUCTIONS
Opcode Operand Description
No operation
NOP none No operation is performed. The instruction is fetched and
decoded. However no operation is executed.
Example: NOP
Halt and enter wait state
HLT none The CPU finishes executing the current instruction and halts
any further execution. An interrupt or reset is necessary to
exit from the halt state.
Example: HLT
Disable interrupts
DI none The interrupt enable flip-flop is reset and all the interrupts
except the TRAP are disabled. No flags are affected.
Example: DI
Enable interrupts
EI none The interrupt enable flip-flop is set and all interrupts are
enabled. No flags are affected. After a system reset or the
acknowledgement of an interrupt, the interrupt enable flipflop
is reset, thus disabling the interrupts. This instruction is
necessary to reenable the interrupts (except TRAP).
Example: EI
8085 Instruction Set Page 15
Read interrupt mask
RIM none This is a multipurpose instruction used to read the status of
interrupts 7.5, 6.5, 5.5 and read serial data input bit. The
instruction loads eight bits in the accumulator with the
following interpretations.
Example: RIM
Set interrupt mask
SIM none This is a multipurpose instruction and used to implement the
8085 interrupts 7.5, 6.5, 5.5, and serial data output. The
instruction interprets the accumulator contents as follows.
Example: SIM
How would you obtain a far address from segment and offset address of a memory location?
Pointers to far objects are stored using four bytes (32 bits). The bytes are stored little endian or low to high order. The first word contains the 14-bit memory offset (bits 14 and 15 are always 0). The second word contains the page number (or segment number for function pointers). The memory address is calculated as follows: Variable Address = (Page * 0x4000L) + OffsetFunction Address = (Segment * 0x10000L) + Offset
Monolithic Programming indicates the program which contain a single function for the large program. It is always fight with modular programming to placed the identity in programming world. Modular programming help the programmer to divide the whole program into different modules and each module is separately developed and tested. Then the linker will link all these modules to form the complete program. On the other hand monolithic programming will not divide the program and it is a single thread of execution. When the program size increases it leads inconvenience and difficult to maintain. Disadvantages of monolithic programming: 1. Difficult to check error on large programs. 2. Difficult to maintain. 3. Code can be specific to a particular problem. i.e. it can not be reused. Advantage of modular programming: 1. Modular program are easier to code and debug. 2. Reduces the programming size. 3. Code can be reused in other programs. 4. Problem can be isolated to specific module so easier to find the error and correct it. Answer posted by: Md. Kahinur Islam Faculty BASE Ltd.
Application of 8086 microprocessor?
It is used for various instruction set and interrupt systems also.
They were a popular, early, microprocessor commonly embedded in washing machines and domestic appliances, to replace mechanical timers and interlocks.
Assembly language code for the Conversion of ascii to binary using 8085 microprocessor?
Org 1000
mov si,1100
mov di,1400
cld
mov bl,20h
next: lodsb
cmp al, bl
je exit
sub al,30h
cmp al,0ah
jc store
sub al,07h
store: stosb
jmp next
exit: hlt
How do you draw timing diagram for 8085 microprocessor CMP instruction?
how to draw timing diagram?discuss the various steps
You first need to understand the machine cycles of 8085
The status signals are as follows
IO/M(bar) :--- 1 IO 0 Memory
S1 | S0 | Process
-----------------------------------------------------------
0 | 0 | Halt
0 | 1 | Write
1 | 0 | Read
1 | 1 | Opcode fetch
1)Opcode fetch ( Compulsory Machine cycle)
This cycle requires 4 T-states.
1st T state ALE is high and lower byte of address from PC(Program Counter) is placed on the multiplexed data/address bus.
In the second T-state, after checking the status of READY pin, RD(bar) goes low the opcode is placed on the data bus, This state continues in the 3rd T-State.
The fourth T-state is used by the uP to decode the instruction and to generate the relevant control signals. The state of the address bus is unspecified( This T-state is used by some DMA controllers to transfer data in hidden/transperant mode)
IO/M_ = 0 S1=1 S0=1
2)Memory read(for 1 byte)
Three T states, similar to the first 3 T states of opcode fetch( as first 3 states of opcode fetch is effectively memory read)
IO/M_ 0 S1 = 1 S0 = 0
3) Memory Write(for 1 byte)
Similar to Write but instead of RD bar WR bar is used. Also the data stays on the bus a little longer than READ*.
IO/M_ 0 S1 = 0 S0 = 1
4) & 5) IO write and read
Simlar to the above two, only IO/M_ = 1
These are the basic machine cycles you will require to draw timing diagrams for most instructions. There are additional cycles such as INTA bar and Bus idle. If anyone requires diagrams for these cycles, message me and i will explain them later.
Also some instructions like CALL require 6 T-state Opcode fetch. For this you can draw the 4 T state Opcode fetch but 4th T state extended to the fifth and sixth T state.
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Now, to draw the timing diagram for any instruction you need to understand what exactly the instruction does. I will explain a few. If you need a specific instruction, msg me.
A) MOV A,B
Draw only opcode fetch as no further memory acces is required as operands specified in registers only
B) MVI A,32H
Draw opcode fetch and memory read as operand(1 byte) has to be fetched from memory
C) LXI H, 2000H
Draw Opcode Fetch and two memory Reads as two bytes, 00H and 20H, (lower byte fetched first) have to be read from memory.
D) STA 2000H
This instruction stores the value of accumulator(8 bit) at the location specified.
Opcode fetch + Memory read * 2 (byte address) + Memory write * 1(1 byte)
i.e 13 T-states 4+3+3+3
During the memory write the address bus contains the address fetched by the memory read cycle earlier
E) CALL addresss(can be specifed in terms of a label)
During a call instruction the uP pushes the current value of program counter(16 bit ie 2 byte) to the stack and then copies the new value from the memory(specified in the instruction)
6 T state Opcode fetch
+ Memory write * 2 (PC pushed to stack)
+ Memory read * 2 (New value of PC fetched from memory)
ie 6 + 3 + 3 + 3 + 3 = 18 T-states
Note that during the memory write cycle the address bus contains the address of the top of the stack(Stack Pointer)
F)JMP 16-bit address
3 Cycles as Follows
4 T-State Opcode Fetch
+ 2 * Memory Read ( 16 bit = 2 bytes)
ie 4 + 3 + 3 = 10 T-states.
Note that separate cycle is not required for loading the address into the PC as PC is a register.
· A latch remembers the last state it was told to with another latching signal
· A buffer merely strengthens a signal so that it can be fanned out with integrity or drive a heftier device. Any amplifier is a buffer. It outputs a state only as long as the state persists on its input(s).
What is a latch in microprocessor?
A latch is a type of flip-flop circuit that is used to store digital information in a microprocessor or other digital system. A latch is essentially a digital memory element that can hold a single bit of information (i.e. a "1" or "0"). Latches can be used to store data that needs to be held temporarily, such as the current state of a program, or to create a temporary buffer for data that is being moved between different parts of a system.
