Intel 8086 and 8088

name "str2bin"

; convert string number to binary!

; this program written in 8086 assembly language to

; convert string value to binary form.

; this example is copied with major modifications

; from macro "scan_num" taken from c:\emu8086\inc\emu8086.inc

;

; the original "scan_num" not only converts the string number

; but also reads the string from the keyboard and supports

; backspace key, this example is a shorten version

; of original "scan_num" macro.

; here we assume that the string number is already given,

; and the string number does not contain non-digit chars

; and it cannot cause buffer overflow (number is in word range

; and/or has only 4 digits).

; negative values are allowed in this example.

; the original "scan_num" does not allow to enter non-digits

; and it also checks for buffer overflow.

; you can the original file with other macro definitions

; in c:\emu8086\inc\emu8086.inc

org 100h

jmp start

; text data:

msg1 db 0Dh,0Ah, " enter any number from -32768 to 65535 inclusive, or zero to stop: $"

msg2 db 0Dh,0Ah, " binary form: $"

; buffer for int 21h/0ah

; fist byte is buffer size,

; second byte is number of chars actually read (set by int 21h/0ah).

buffer db 7,?, 5 dup (0), 0, 0

; for result:

binary dw ?

start:

; print welcome message:

mov dx, offset msg1

The differences are given below:

80286

1. Low data bus width (16 bit)

2. Returning from protected mode to

real mode is hard and complicated.

3. Small RAM/Memory

80386

1. High data bus width (32 bit)

2. Easy for 80386 3. Big RAM / Memory (Real memory = 4GB and virtual memory= 64TB)

The 8086/8088 is a 16 bit processor running on a 16 bit (8086) or 8 bit (8088) bus with a 20 bit address bus. In order to obtain the extra 4 bits of addressibility, Intel designed segment registers that are effectively multiplied by four and then added to the 16 bit offset address generated by the instruction. This yields 64K segments of 64KB each, although they overlap each other at a distance of 16 bytes.

; program for moving a string from one block of memory

;to another block of memory

data segment

str1 db 'suriya',0

str2 db 20 dup(0)

data ends

code segment

assume cs:code,ds:data,es:data

start: mov ax,data

mov ds,ax

mov es,ax

mov cx,6

lea si,str1

lea di,str2

cld

rep movsb

int 3h

code ends

end start

Language processors are language translation software like assembler, interpreter and compiler

org 100h

.data

str1 db "Computer"

str2 db "computer"

mes1 db "string are same $"

mes2 db "string are different $"

.code

assume cs:code,ds:data

start: mov ax,@data

mov ds,ax

mov es,ax

mov si,offset str1

mov di,offset str2

cld

mov cx,8

repe cmpsb

mov ah,9

jz skip

lea dx,mes2

jmp over

skip: lea dx,mes1

over: int 21h

mov ax,4c00h

int 21h

end start

ret

The microcontrollers have an 8-bit data bus. They are capable of addressing 64K of program memory and a separate 64K of data memory. The 8051 has 4K of code memory implemented as on-chip Read Only Memory (ROM). The 8051 has 128 bytes of internal Random Access Memory (RAM). The 8051 has two timer/counters, a serial port, 4 general purpose parallel input/output ports, and interrupt control logic with five sources of interrupts. Besides internal RAM, the 8051 has various Special Function Registers (SFR), which are the control and data registers for on-chip facilities. The SFRs also include the accumulator, the B register, and the Program Status Word (PSW), which contains the CPU flags. << SHARMILA TANDEL (B.E) ELECTRONICS >>

THE PARTS OF THE MICROPROCESSOR ARE;

a) CORE

b) CODE CACHE

c) INSTRUCTION DECODER AND PREFETCH UNIT

d) BRANCH PREDICTOR

e) INTEGER ALU (arithmetic and logic unit)

f) REGISTERS

g) EXECUTION UNIT

h) 32-BIT BUSES

i) FLOATING POINT UNIT

j) DATA CACHE

k) PRIMARY CACHE

l) BUS INTERFACE

m) 64-BIT BUSES

8051: 16 bit Microcontroller

on chip ROM( 8KB) and On chip RAM (128 bytes)

two 16 bit timer/counter.

four 8-bit ports for input/output

fully duplex serial receiver/transmitter.

no prefetching of instruction.

16 address pins

8086: 16 bit Microprocessor

No on chip memory.

memory is divided into two banks to increase the processing speed.

prefetching of 6 bytes of instruction in a queue.

20 address pins

During the start of execution, the microprocessor executes all instructions from BIOS. This in turn fetches the boot sector.

Subroutine is an instruction sequence in a machine or assembly language program that can be prewritten and referred to as often as needed. Subroutine is used for controlling thing e.g. traffic lights burglar alarms they all use subroutine

Pointers to far objects are stored using four bytes (32 bits). The bytes are stored little endian or low to high order. The first word contains the 14-bit memory offset (bits 14 and 15 are always 0). The second word contains the page number (or segment number for function pointers). The memory address is calculated as follows: Variable Address = (Page * 0x4000L) + OffsetFunction Address = (Segment * 0x10000L) + Offset

.data mult1 dw 2521H dw 3206H mult2 dw 0A26H dw 6400H ans dw 0,0,0,0 .code mov ax,@data mov ds,ax ; LEA SI,ans mov ax,mult1 mul mult2 mov ans,ax mov ans+2,dx mov ax,mult1+2 mul mult2 add ans+2,ax adc ans+4,dx adc ans+6,0 mov ax,mult1 mul mult2+2 add ans+2,ax adc ans+4,dx adc ans+6,0 mov ax,mult1+2 mul mult2+2 add ans+4,ax adc ans+6,dx mov ax,4C00h int 21h end

Manual coding of 8086 is difficult hence we use a assembler or a compiler. Note that the microprocessor should be able to interpret your discussions via the program. Suppose if the instruction corresponds to word(16 bits), we use assembler directive WORD PTR, but when assembler is contacting the processor it sets a bit called 'w' indicating its a byte operation.

8096

You can't convert a HTML into CSS in the same way you can convert, say a .wmv file to a .mpg file.

CSS is a way to style HTML items but doesn't use the same language as HTML.

There may be software solutions that may be able to extract the styling instructions written in HTML and convert the language into CSS but failing that you'll have to rewrite the HTML styling into CSS manually. Whilst you can have CSS and HTML in the same .html document generally the CSS will be the styling and the HTML will be the content.

I say 'generally' because it is possible to add 'content' using CSS and to still style using HTML within the same document.

A latch is a type of flip-flop circuit that is used to store digital information in a microprocessor or other digital system. A latch is essentially a digital memory element that can hold a single bit of information (i.e. a "1" or "0"). Latches can be used to store data that needs to be held temporarily, such as the current state of a program, or to create a temporary buffer for data that is being moved between different parts of a system.

Control Flag Register:

The Control Flag Register (CFR), also known as the Program Status Word (PSW), is a register used to control the execution flow and behavior of the processor. It typically stores various control flags that govern different aspects of the CPU's operation. Some common flags found in the Control Flag Register include:

Carry Flag (CF): Used to indicate whether an arithmetic operation generated a carry or borrow.

Zero Flag (ZF): Indicates whether the result of an operation is zero.

Sign Flag (SF): Indicates the sign (positive or negative) of the result.

Overflow Flag (OF): Indicates whether an arithmetic operation resulted in an overflow.

Interrupt Flag (IF): Determines whether interrupts are enabled or disabled.

The Control Flag Register provides control over program execution, including branching, interrupt handling, and arithmetic operations. It helps determine the outcome of operations and can be used for conditional branching based on specific flag states.

Conditional Flag Register:

The Conditional Flag Register (CFR), also known as the Condition Code Register (CCR) or Status Register (SR), contains flags that reflect the result of the most recent arithmetic or logical operation performed by the processor. These flags are used to perform conditional branching and control the flow of instructions based on specific conditions.

The flags present in the Conditional Flag Register can vary depending on the processor architecture, but some common flags include:

Zero Flag (ZF): Indicates whether the result of an operation is zero.

Sign Flag (SF): Indicates the sign (positive or negative) of the result.

Overflow Flag (OF): Indicates whether an arithmetic operation resulted in an overflow.

Carry Flag (CF): Used to indicate whether an arithmetic operation generated a carry or borrow.

Auxiliary Carry Flag (AF): Indicates a carry or borrow from the lower-order nibble (4 bits) to the higher-order nibble.

The Conditional Flag Register is primarily used for conditional jumps or branches, allowing the processor to alter the program flow based on the current flag states.

To summarize, the Control Flag Register focuses on controlling the processor's behavior and handling interrupts, while the Conditional Flag Register reflects the outcome of arithmetic and logical operations and enables conditional branching based on flag states.

Typically, the house number and street name.

Line 2 would be city, state. (US)

An 8 bit displacement is a two's complement signed value, with a possible range of -128 to +127. To convert it to an 16 bit displacement, sign extension is done. This means that the implied high byte is FFH if the high bit of the low byte is 1, or 00H if not. The resulting 16 bit displacement will still have a range of -128 to +127.

flattery is when you lie to some one just to make him/her feel better when they are in serious problems.Even know you dont mind we use flattery every day.

The BHE (Bus High Enable) pin on the 8086 is latched by the 8282 in order to indicate if a write cycle is a word (BHE=1) or byte (BHE=0) cycle.

The interrupt vector table in the 8086/8088 is the first 1024 bytes in memory. There are 256 vectors, each containing 4 bytes, CS:IP, for each possible interrupt source.

list out assembler directive?

it means an archioligist